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Thierry Reding 029ab5eaf0 dt-bindings: memory: Add Tegra186 support
As opposed to earlier incarnations, the memory controller on Tegra186 no
longer implements an SMMU. Instead the SMMU is a regular ARM SMMU and in
a separate IP block.

However, the memory controller programs the SMMU stream IDs for each of
the memory clients. Add a header file with definitions for each of these
stream IDs and mark the #iommu-cells property as required on Tegra30 to
Tegra210 in the device tree bindings.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 12:53:43 +01:00
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