forked from Minki/linux
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SMBus alert support. The SMBus alert protocol allows several SMBus slave devices to share a single interrupt pin on the SMBus master, while still allowing the master to know which slave triggered the interrupt. This is based on preliminary work by David Brownell. The key difference between David's implementation and mine is that his was part of i2c-core, while mine is split into a separate, standalone module named i2c-smbus. The i2c-smbus module is meant to include support for all SMBus extensions to the I2C protocol in the future. The benefit of this approach is a zero cost for I2C bus segments which do not need SMBus alert support. Where David's implementation increased the size of struct i2c_adapter by 7% (40 bytes on i386), mine doesn't touch it. Where David's implementation added over 150 lines of code to i2c-core (+10%), mine doesn't touch it. The only change that touches all the users of the i2c subsystem is a new callback in struct i2c_driver (common to both implementations.) I seem to remember Trent was worried about the footprint of David'd implementation, hopefully mine addresses the issue. Signed-off-by: Jean Delvare <khali@linux-fr.org> Acked-by: Jonathan Cameron <jic23@cam.ac.uk> Cc: David Brownell <dbrownell@users.sourceforge.net> Cc: Trent Piepho <tpiepho@freescale.com>
244 lines
8.0 KiB
Plaintext
244 lines
8.0 KiB
Plaintext
SMBus Protocol Summary
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======================
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The following is a summary of the SMBus protocol. It applies to
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all revisions of the protocol (1.0, 1.1, and 2.0).
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Certain protocol features which are not supported by
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this package are briefly described at the end of this document.
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Some adapters understand only the SMBus (System Management Bus) protocol,
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which is a subset from the I2C protocol. Fortunately, many devices use
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only the same subset, which makes it possible to put them on an SMBus.
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If you write a driver for some I2C device, please try to use the SMBus
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commands if at all possible (if the device uses only that subset of the
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I2C protocol). This makes it possible to use the device driver on both
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SMBus adapters and I2C adapters (the SMBus command set is automatically
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translated to I2C on I2C adapters, but plain I2C commands can not be
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handled at all on most pure SMBus adapters).
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Below is a list of SMBus protocol operations, and the functions executing
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them. Note that the names used in the SMBus protocol specifications usually
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don't match these function names. For some of the operations which pass a
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single data byte, the functions using SMBus protocol operation names execute
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a different protocol operation entirely.
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Key to symbols
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==============
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S (1 bit) : Start bit
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P (1 bit) : Stop bit
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Rd/Wr (1 bit) : Read/Write bit. Rd equals 1, Wr equals 0.
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A, NA (1 bit) : Accept and reverse accept bit.
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Addr (7 bits): I2C 7 bit address. Note that this can be expanded as usual to
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get a 10 bit I2C address.
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Comm (8 bits): Command byte, a data byte which often selects a register on
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the device.
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Data (8 bits): A plain data byte. Sometimes, I write DataLow, DataHigh
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for 16 bit data.
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Count (8 bits): A data byte containing the length of a block operation.
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[..]: Data sent by I2C device, as opposed to data sent by the host adapter.
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SMBus Quick Command
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===================
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This sends a single bit to the device, at the place of the Rd/Wr bit.
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A Addr Rd/Wr [A] P
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SMBus Receive Byte: i2c_smbus_read_byte()
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==========================================
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This reads a single byte from a device, without specifying a device
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register. Some devices are so simple that this interface is enough; for
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others, it is a shorthand if you want to read the same register as in
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the previous SMBus command.
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S Addr Rd [A] [Data] NA P
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SMBus Send Byte: i2c_smbus_write_byte()
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========================================
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This operation is the reverse of Receive Byte: it sends a single byte
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to a device. See Receive Byte for more information.
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S Addr Wr [A] Data [A] P
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SMBus Read Byte: i2c_smbus_read_byte_data()
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============================================
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This reads a single byte from a device, from a designated register.
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The register is specified through the Comm byte.
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S Addr Wr [A] Comm [A] S Addr Rd [A] [Data] NA P
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SMBus Read Word: i2c_smbus_read_word_data()
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============================================
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This operation is very like Read Byte; again, data is read from a
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device, from a designated register that is specified through the Comm
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byte. But this time, the data is a complete word (16 bits).
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S Addr Wr [A] Comm [A] S Addr Rd [A] [DataLow] A [DataHigh] NA P
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SMBus Write Byte: i2c_smbus_write_byte_data()
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==============================================
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This writes a single byte to a device, to a designated register. The
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register is specified through the Comm byte. This is the opposite of
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the Read Byte operation.
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S Addr Wr [A] Comm [A] Data [A] P
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SMBus Write Word: i2c_smbus_write_word_data()
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==============================================
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This is the opposite of the Read Word operation. 16 bits
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of data is written to a device, to the designated register that is
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specified through the Comm byte.
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S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P
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SMBus Process Call: i2c_smbus_process_call()
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=============================================
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This command selects a device register (through the Comm byte), sends
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16 bits of data to it, and reads 16 bits of data in return.
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S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A]
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S Addr Rd [A] [DataLow] A [DataHigh] NA P
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SMBus Block Read: i2c_smbus_read_block_data()
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==============================================
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This command reads a block of up to 32 bytes from a device, from a
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designated register that is specified through the Comm byte. The amount
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of data is specified by the device in the Count byte.
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S Addr Wr [A] Comm [A]
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S Addr Rd [A] [Count] A [Data] A [Data] A ... A [Data] NA P
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SMBus Block Write: i2c_smbus_write_block_data()
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================================================
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The opposite of the Block Read command, this writes up to 32 bytes to
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a device, to a designated register that is specified through the
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Comm byte. The amount of data is specified in the Count byte.
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S Addr Wr [A] Comm [A] Count [A] Data [A] Data [A] ... [A] Data [A] P
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SMBus Block Write - Block Read Process Call
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===========================================
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SMBus Block Write - Block Read Process Call was introduced in
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Revision 2.0 of the specification.
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This command selects a device register (through the Comm byte), sends
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1 to 31 bytes of data to it, and reads 1 to 31 bytes of data in return.
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S Addr Wr [A] Comm [A] Count [A] Data [A] ...
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S Addr Rd [A] [Count] A [Data] ... A P
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SMBus Host Notify
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=================
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This command is sent from a SMBus device acting as a master to the
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SMBus host acting as a slave.
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It is the same form as Write Word, with the command code replaced by the
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alerting device's address.
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[S] [HostAddr] [Wr] A [DevAddr] A [DataLow] A [DataHigh] A [P]
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Packet Error Checking (PEC)
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===========================
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Packet Error Checking was introduced in Revision 1.1 of the specification.
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PEC adds a CRC-8 error-checking byte to transfers using it, immediately
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before the terminating STOP.
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Address Resolution Protocol (ARP)
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=================================
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The Address Resolution Protocol was introduced in Revision 2.0 of
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the specification. It is a higher-layer protocol which uses the
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messages above.
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ARP adds device enumeration and dynamic address assignment to
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the protocol. All ARP communications use slave address 0x61 and
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require PEC checksums.
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SMBus Alert
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===========
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SMBus Alert was introduced in Revision 1.0 of the specification.
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The SMBus alert protocol allows several SMBus slave devices to share a
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single interrupt pin on the SMBus master, while still allowing the master
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to know which slave triggered the interrupt.
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This is implemented the following way in the Linux kernel:
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* I2C bus drivers which support SMBus alert should call
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i2c_setup_smbus_alert() to setup SMBus alert support.
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* I2C drivers for devices which can trigger SMBus alerts should implement
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the optional alert() callback.
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I2C Block Transactions
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======================
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The following I2C block transactions are supported by the
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SMBus layer and are described here for completeness.
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They are *NOT* defined by the SMBus specification.
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I2C block transactions do not limit the number of bytes transferred
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but the SMBus layer places a limit of 32 bytes.
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I2C Block Read: i2c_smbus_read_i2c_block_data()
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================================================
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This command reads a block of bytes from a device, from a
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designated register that is specified through the Comm byte.
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S Addr Wr [A] Comm [A]
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S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
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I2C Block Read (2 Comm bytes)
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=============================
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This command reads a block of bytes from a device, from a
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designated register that is specified through the two Comm bytes.
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S Addr Wr [A] Comm1 [A] Comm2 [A]
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S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
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I2C Block Write: i2c_smbus_write_i2c_block_data()
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==================================================
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The opposite of the Block Read command, this writes bytes to
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a device, to a designated register that is specified through the
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Comm byte. Note that command lengths of 0, 2, or more bytes are
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supported as they are indistinguishable from data.
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S Addr Wr [A] Comm [A] Data [A] Data [A] ... [A] Data [A] P
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