forked from Minki/linux
a0776ec8e9
It's not efficient to use a per-cpu variable just to store
how many physical stack register a cpu has. Ever since the
incarnation of ia64 up till upcoming Montecito processor, that
variable has "glued" to 96. Having a variable in memory means
that the kernel is burning an extra cacheline access on every
syscall and kernel exit path. Such "static" value is better
served with the instruction patching utility exists today.
Convert ia64_phys_stacked_size_p8 into dynamic insn patching.
This also has a pleasant side effect of eliminating access to
per-cpu area while psr.ic=0 in the kernel exit path. (fixable
for per-cpu DTC work, but why bother?)
There are some concerns with the default value that the instruc-
tion encoded in the kernel image. It shouldn't be concerned.
The reasons are:
(1) cpu_init() is called at CPU initialization. In there, we
find out physical stack register size from PAL and patch
two instructions in kernel exit code. The code in question
can not be executed before the patching is done.
(2) current implementation stores zero in ia64_phys_stacked_size_p8,
and that's what the current kernel exit path loads the value with.
With the new code, it is equivalent that we store reg size 96
in ia64_phys_stacked_size_p8, thus creating a better safety net.
Given (1) above can never fail, having (2) is just a bonus.
All in all, this patch allow one less memory reference in the kernel
exit path, thus reducing syscall and interrupt return latency; and
avoid polluting potential useful data in the CPU cache.
Signed-off-by: Ken Chen <kenneth.w.chen@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
27 lines
1.1 KiB
C
27 lines
1.1 KiB
C
#ifndef _ASM_IA64_PATCH_H
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#define _ASM_IA64_PATCH_H
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/*
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* Copyright (C) 2003 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*
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* There are a number of reasons for patching instructions. Rather than duplicating code
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* all over the place, we put the common stuff here. Reasons for patching: in-kernel
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* module-loader, virtual-to-physical patch-list, McKinley Errata 9 workaround, and gate
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* shared library. Undoubtedly, some of these reasons will disappear and others will
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* be added over time.
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*/
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#include <linux/elf.h>
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#include <linux/types.h>
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extern void ia64_patch (u64 insn_addr, u64 mask, u64 val); /* patch any insn slot */
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extern void ia64_patch_imm64 (u64 insn_addr, u64 val); /* patch "movl" w/abs. value*/
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extern void ia64_patch_imm60 (u64 insn_addr, u64 val); /* patch "brl" w/ip-rel value */
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extern void ia64_patch_mckinley_e9 (unsigned long start, unsigned long end);
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extern void ia64_patch_vtop (unsigned long start, unsigned long end);
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extern void ia64_patch_phys_stack_reg(unsigned long val);
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extern void ia64_patch_gate (void);
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#endif /* _ASM_IA64_PATCH_H */
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