Thierry Reding 2cda1880f8 ARM: tegra: Fix unit address for Cortex-A9 TWD timer ... The Cortex-A9 TWD timer has registers at address 0x50040600, but the unit address was 50004600, most likely a typo. Signed-off-by: Thierry Reding <treding@nvidia.com>		2015-01-09 11:45:15 +01:00
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bootp	ARM: 8153/1: Enable gcov support on the ARM architecture	2014-09-26 14:39:57 +01:00
compressed	ARM: 8191/1: decompressor: ensure I-side picks up relocated code	2014-11-13 23:45:20 +00:00
dts	ARM: tegra: Fix unit address for Cortex-A9 TWD timer	2015-01-09 11:45:15 +01:00
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