Ville Syrjälä 2cb389b7e4 drm/i915: Zero unused WM1 watermarks on VLV/CHV ... The hardware supposedly ignores the WM1 watermarks while the PND deadline mode is enabled, but clear out the register just in case. This is what the other OS does, and it does make register dumps look more consistent when we don't have partial WM1 values lingering in the registers (some WM1 watermarks already get zeroed when the actually used DSPFW registers get written). Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>		2015-06-29 11:00:11 +02:00
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drm	drm/i915: Zero unused WM1 watermarks on VLV/CHV	2015-06-29 11:00:11 +02:00
host1x	gpu: host1x: Export host1x_syncpt_read()	2015-04-02 18:46:20 +02:00
ipu-v3	imx-drm changes to use media bus formats and LDB drm_panel support	2015-04-13 17:28:57 +10:00
vga	Merge branch 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip	2014-10-13 16:23:15 +02:00
Makefile	gpu: host1x: Provide a proper struct bus_type	2015-01-27 10:09:14 +01:00