Ido Schimmel 2c63a555e8 mlxsw: reg: Add QoS Switch Traffic Class Table register ... As part of DCB ops we'll have to configure the priority to traffic class mapping of a port. Add the QoS Switch Traffic Class Table (QTCT) register, which configures the mapping between the packet switch priority and traffic class on the transmit port. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>		2016-04-06 17:24:18 -04:00
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mlx4	net/mlx4: remove unused array zero_gid[]	2016-03-20 16:24:06 -04:00
mlx5/core	Round two of 4.6 merge window patches	2016-03-22 15:48:44 -07:00
mlxsw	mlxsw: reg: Add QoS Switch Traffic Class Table register	2016-04-06 17:24:18 -04:00
Kconfig	mlxsw: Introduce Mellanox switch driver core	2015-07-30 00:04:59 -07:00
Makefile	mlxsw: Introduce Mellanox switch driver core	2015-07-30 00:04:59 -07:00