Peter Zijlstra f2200ac311 perf/x86: Avoid exposing wrong/stale data in intel_pmu_lbr_read_32() ... When the perf_branch_entry::{in_tx,abort,cycles} fields were added, intel_pmu_lbr_read_32() wasn't updated to initialize them. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-kernel@vger.kernel.org Cc: <stable@vger.kernel.org> Fixes: 135c5612c4 ("perf/x86/intel: Support Haswell/v4 LBR format") Signed-off-by: Ingo Molnar <mingo@kernel.org>		2017-04-14 10:18:00 +02:00
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amd
intel	perf/x86: Avoid exposing wrong/stale data in intel_pmu_lbr_read_32()	2017-04-14 10:18:00 +02:00
core.c	sched/clock, x86/perf: Fix "perf test tsc"	2017-03-23 07:31:49 +01:00
Kconfig
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msr.c
perf_event.h