Anup Patel 2bc3fc877a RISC-V: Remove CLINT related code from timer and arch ... Right now the RISC-V timer driver is convoluted to support: 1. Linux RISC-V S-mode (with MMU) where it will use TIME CSR for clocksource and SBI timer calls for clockevent device. 2. Linux RISC-V M-mode (without MMU) where it will use CLINT MMIO counter register for clocksource and CLINT MMIO compare register for clockevent device. We now have a separate CLINT timer driver which also provide CLINT based IPI operations so let's remove CLINT MMIO related code from arch/riscv directory and RISC-V timer driver. Signed-off-by: Anup Patel <anup.patel@wdc.com> Tested-by: Emil Renner Berhing <kernel@esmil.dk> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>		2020-08-20 10:58:13 -07:00
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boot	riscv: Allow building with kcov coverage	2020-07-30 11:37:35 -07:00
configs	RISC-V: Remove CLINT related code from timer and arch	2020-08-20 10:58:13 -07:00
include	RISC-V: Remove CLINT related code from timer and arch	2020-08-20 10:58:13 -07:00
kernel	RISC-V: Remove CLINT related code from timer and arch	2020-08-20 10:58:13 -07:00
lib	RISC-V Patches for the 5.7 Merge Window, Part 1	2020-04-09 10:51:30 -07:00
mm	mm/riscv: use general page fault accounting	2020-08-12 10:58:03 -07:00
net	bpf, riscv: Use compressed instructions in the rv64 JIT	2020-07-21 13:26:25 -07:00
Kbuild	riscv: Allow device trees to be built into the kernel	2020-05-18 11:38:05 -07:00
Kconfig	RISC-V: Remove CLINT related code from timer and arch	2020-08-20 10:58:13 -07:00
Kconfig.debug
Kconfig.socs	RISC-V: Remove CLINT related code from timer and arch	2020-08-20 10:58:13 -07:00
Makefile	RISC-V Patches for the 5.7 Merge Window, Part 1	2020-04-09 10:51:30 -07:00