forked from Minki/linux
2ab51ddeca
Extend pci_bus_find_domain_nr() so it can find the domain from either: - ACPI, via the new acpi_pci_bus_find_domain_nr() interface, or - DT, via of_pci_bus_find_domain_nr() Note that this is only used for CONFIG_PCI_DOMAINS_GENERIC=y, so it does not affect x86 or ia64. [bhelgaas: changelog] Signed-off-by: Tomasz Nowicki <tn@semihalf.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
102 lines
2.1 KiB
C
102 lines
2.1 KiB
C
/*
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* Code borrowed from powerpc/kernel/pci-common.c
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*
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* Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
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* Copyright (C) 2014 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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*/
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#include <linux/acpi.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/of_pci.h>
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#include <linux/of_platform.h>
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#include <linux/pci.h>
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#include <linux/slab.h>
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/*
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* Called after each bus is probed, but before its children are examined
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*/
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void pcibios_fixup_bus(struct pci_bus *bus)
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{
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/* nothing to do, expected to be removed in the future */
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}
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/*
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* We don't have to worry about legacy ISA devices, so nothing to do here
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*/
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resource_size_t pcibios_align_resource(void *data, const struct resource *res,
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resource_size_t size, resource_size_t align)
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{
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return res->start;
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}
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/**
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* pcibios_enable_device - Enable I/O and memory.
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* @dev: PCI device to be enabled
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* @mask: bitmask of BARs to enable
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*/
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int pcibios_enable_device(struct pci_dev *dev, int mask)
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{
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if (pci_has_flag(PCI_PROBE_ONLY))
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return 0;
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return pci_enable_resources(dev, mask);
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}
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/*
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* Try to assign the IRQ number from DT when adding a new device
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*/
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int pcibios_add_device(struct pci_dev *dev)
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{
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dev->irq = of_irq_parse_and_map_pci(dev, 0, 0);
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return 0;
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}
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/*
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* raw_pci_read/write - Platform-specific PCI config space access.
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*/
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int raw_pci_read(unsigned int domain, unsigned int bus,
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unsigned int devfn, int reg, int len, u32 *val)
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{
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return -ENXIO;
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}
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int raw_pci_write(unsigned int domain, unsigned int bus,
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unsigned int devfn, int reg, int len, u32 val)
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{
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return -ENXIO;
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}
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#ifdef CONFIG_NUMA
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int pcibus_to_node(struct pci_bus *bus)
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{
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return dev_to_node(&bus->dev);
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}
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EXPORT_SYMBOL(pcibus_to_node);
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#endif
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#ifdef CONFIG_ACPI
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int acpi_pci_bus_find_domain_nr(struct pci_bus *bus)
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{
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return 0;
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}
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/* Root bridge scanning */
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struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
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{
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/* TODO: Should be revisited when implementing PCI on ACPI */
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return NULL;
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}
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#endif
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