forked from Minki/linux
801d233b73
Like the STi and sunxi series SOCs, Altera's SOCFPGA also needs a glue layer on top of the Synopsys gmac IP. This patch adds the platform driver for the glue layer which configures the IP before the generic STMMAC driver takes over. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: David S. Miller <davem@davemloft.net>
202 lines
5.3 KiB
C
202 lines
5.3 KiB
C
/*******************************************************************************
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Copyright (C) 2007-2009 STMicroelectronics Ltd
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
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*******************************************************************************/
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#ifndef __STMMAC_H__
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#define __STMMAC_H__
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#define STMMAC_RESOURCE_NAME "stmmaceth"
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#define DRV_MODULE_VERSION "March_2013"
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#include <linux/clk.h>
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#include <linux/stmmac.h>
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#include <linux/phy.h>
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#include <linux/pci.h>
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#include "common.h"
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#include <linux/ptp_clock_kernel.h>
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#include <linux/reset.h>
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struct stmmac_priv {
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/* Frequently used values are kept adjacent for cache effect */
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struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp;
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struct dma_desc *dma_tx;
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struct sk_buff **tx_skbuff;
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unsigned int cur_tx;
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unsigned int dirty_tx;
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unsigned int dma_tx_size;
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u32 tx_count_frames;
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u32 tx_coal_frames;
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u32 tx_coal_timer;
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dma_addr_t *tx_skbuff_dma;
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dma_addr_t dma_tx_phy;
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int tx_coalesce;
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int hwts_tx_en;
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spinlock_t tx_lock;
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bool tx_path_in_lpi_mode;
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struct timer_list txtimer;
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struct dma_desc *dma_rx ____cacheline_aligned_in_smp;
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struct dma_extended_desc *dma_erx;
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struct sk_buff **rx_skbuff;
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unsigned int cur_rx;
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unsigned int dirty_rx;
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unsigned int dma_rx_size;
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unsigned int dma_buf_sz;
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u32 rx_riwt;
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int hwts_rx_en;
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dma_addr_t *rx_skbuff_dma;
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dma_addr_t dma_rx_phy;
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struct napi_struct napi ____cacheline_aligned_in_smp;
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void __iomem *ioaddr;
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struct net_device *dev;
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struct device *device;
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struct mac_device_info *hw;
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spinlock_t lock;
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struct phy_device *phydev ____cacheline_aligned_in_smp;
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int oldlink;
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int speed;
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int oldduplex;
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unsigned int flow_ctrl;
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unsigned int pause;
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struct mii_bus *mii;
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int mii_irq[PHY_MAX_ADDR];
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struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp;
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struct plat_stmmacenet_data *plat;
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struct dma_features dma_cap;
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struct stmmac_counters mmc;
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int hw_cap_support;
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int synopsys_id;
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u32 msg_enable;
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int wolopts;
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int wol_irq;
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struct clk *stmmac_clk;
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struct reset_control *stmmac_rst;
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int clk_csr;
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struct timer_list eee_ctrl_timer;
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int lpi_irq;
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int eee_enabled;
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int eee_active;
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int tx_lpi_timer;
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int pcs;
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unsigned int mode;
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int extend_desc;
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struct ptp_clock *ptp_clock;
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struct ptp_clock_info ptp_clock_ops;
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unsigned int default_addend;
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u32 adv_ts;
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int use_riwt;
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int irq_wake;
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spinlock_t ptp_lock;
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};
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int stmmac_mdio_unregister(struct net_device *ndev);
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int stmmac_mdio_register(struct net_device *ndev);
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int stmmac_mdio_reset(struct mii_bus *mii);
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void stmmac_set_ethtool_ops(struct net_device *netdev);
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extern const struct stmmac_desc_ops enh_desc_ops;
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extern const struct stmmac_desc_ops ndesc_ops;
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extern const struct stmmac_hwtimestamp stmmac_ptp;
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int stmmac_ptp_register(struct stmmac_priv *priv);
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void stmmac_ptp_unregister(struct stmmac_priv *priv);
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int stmmac_resume(struct net_device *ndev);
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int stmmac_suspend(struct net_device *ndev);
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int stmmac_dvr_remove(struct net_device *ndev);
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struct stmmac_priv *stmmac_dvr_probe(struct device *device,
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struct plat_stmmacenet_data *plat_dat,
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void __iomem *addr);
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void stmmac_disable_eee_mode(struct stmmac_priv *priv);
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bool stmmac_eee_init(struct stmmac_priv *priv);
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#ifdef CONFIG_STMMAC_PLATFORM
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#ifdef CONFIG_DWMAC_SUNXI
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extern const struct stmmac_of_data sun7i_gmac_data;
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#endif
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#ifdef CONFIG_DWMAC_STI
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extern const struct stmmac_of_data sti_gmac_data;
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#endif
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#ifdef CONFIG_DWMAC_SOCFPGA
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extern const struct stmmac_of_data socfpga_gmac_data;
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#endif
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extern struct platform_driver stmmac_pltfr_driver;
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static inline int stmmac_register_platform(void)
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{
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int err;
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err = platform_driver_register(&stmmac_pltfr_driver);
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if (err)
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pr_err("stmmac: failed to register the platform driver\n");
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return err;
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}
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static inline void stmmac_unregister_platform(void)
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{
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platform_driver_unregister(&stmmac_pltfr_driver);
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}
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#else
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static inline int stmmac_register_platform(void)
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{
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pr_debug("stmmac: do not register the platf driver\n");
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return 0;
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}
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static inline void stmmac_unregister_platform(void)
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{
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}
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#endif /* CONFIG_STMMAC_PLATFORM */
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#ifdef CONFIG_STMMAC_PCI
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extern struct pci_driver stmmac_pci_driver;
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static inline int stmmac_register_pci(void)
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{
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int err;
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err = pci_register_driver(&stmmac_pci_driver);
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if (err)
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pr_err("stmmac: failed to register the PCI driver\n");
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return err;
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}
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static inline void stmmac_unregister_pci(void)
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{
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pci_unregister_driver(&stmmac_pci_driver);
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}
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#else
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static inline int stmmac_register_pci(void)
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{
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pr_debug("stmmac: do not register the PCI driver\n");
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return 0;
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}
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static inline void stmmac_unregister_pci(void)
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{
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}
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#endif /* CONFIG_STMMAC_PCI */
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#endif /* __STMMAC_H__ */
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