a5f17d1f4c
.. several days delayed. No reason, I just didn't think of it. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.18 (GNU/Linux) iQEcBAABAgAGBQJPKF4KAAoJEHm+PkMAQRiGw/YH+wXg2DpZUuHeBK52zMGlJBPc DzX11/Uan3Y07gM0JbDzuVxwjX4vdxR2bV6r1qsLP8JEUnE8jyFC32DBGi5WAht7 F4KU/Uov2Ds5/wzvY4Iuo01C+JftQHXuy/Sbhck1d0LI0yjLejRaw+zuJv0x2/eS 7YqV+KTGE1lDuJs/Gyq1Vqr1g9831AuS1tv/g3gaqBuN6TcPBFCocaVxzwrUc+y6 94h26XbbOhQRIz38oqUkiqAGnvYS61ocyBcEiRHf0dXkNSDIINqlgukvd7YTXouA jj/w/DWpMRcQuYAgqkrurr9+yWC9hVQcsvvQ5sAQnIPcxoR868sg1pO8Oheq+1g= =kUzV -----END PGP SIGNATURE----- Merge tag 'v3.3-rc2' into depends/rmk/for-armsoc There were conflicts between fixes going in after 3.3-rc1 and Russell's stable arm-soc base branch. Resolving it in the dependency branch so that each topic branch shares the same resolution. Conflicts: arch/arm/mach-at91/at91cap9.c arch/arm/mach-at91/at91sam9g45.c
471 lines
12 KiB
C
471 lines
12 KiB
C
/*
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* linux/arch/arm/mach-realview/realview_eb.c
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*
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* Copyright (C) 2004 ARM Limited
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* Copyright (C) 2000 Deep Blue Solutions Ltd
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/device.h>
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#include <linux/amba/bus.h>
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#include <linux/amba/pl061.h>
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#include <linux/amba/mmci.h>
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#include <linux/amba/pl022.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <asm/irq.h>
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#include <asm/leds.h>
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#include <asm/mach-types.h>
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#include <asm/pmu.h>
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#include <asm/pgtable.h>
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#include <asm/hardware/gic.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <asm/localtimer.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/time.h>
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#include <mach/board-eb.h>
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#include <mach/irqs.h>
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#include "core.h"
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static struct map_desc realview_eb_io_desc[] __initdata = {
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{
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.virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
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.pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_EB_GIC_CPU_BASE),
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.pfn = __phys_to_pfn(REALVIEW_EB_GIC_CPU_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_EB_GIC_DIST_BASE),
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.pfn = __phys_to_pfn(REALVIEW_EB_GIC_DIST_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
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.pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_EB_TIMER0_1_BASE),
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.pfn = __phys_to_pfn(REALVIEW_EB_TIMER0_1_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_EB_TIMER2_3_BASE),
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.pfn = __phys_to_pfn(REALVIEW_EB_TIMER2_3_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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},
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#ifdef CONFIG_DEBUG_LL
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{
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.virtual = IO_ADDRESS(REALVIEW_EB_UART0_BASE),
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.pfn = __phys_to_pfn(REALVIEW_EB_UART0_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}
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#endif
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};
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static struct map_desc realview_eb11mp_io_desc[] __initdata = {
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{
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.virtual = IO_ADDRESS(REALVIEW_EB11MP_PRIV_MEM_BASE),
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.pfn = __phys_to_pfn(REALVIEW_EB11MP_PRIV_MEM_BASE),
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.length = REALVIEW_EB11MP_PRIV_MEM_SIZE,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE),
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.pfn = __phys_to_pfn(REALVIEW_EB11MP_L220_BASE),
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.length = SZ_8K,
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.type = MT_DEVICE,
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}
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};
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static void __init realview_eb_map_io(void)
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{
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iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
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if (core_tile_eb11mp() || core_tile_a9mp())
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iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
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}
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static struct pl061_platform_data gpio0_plat_data = {
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.gpio_base = 0,
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};
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static struct pl061_platform_data gpio1_plat_data = {
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.gpio_base = 8,
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};
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static struct pl061_platform_data gpio2_plat_data = {
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.gpio_base = 16,
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};
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static struct pl022_ssp_controller ssp0_plat_data = {
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.bus_id = 0,
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.enable_dma = 0,
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.num_chipselect = 1,
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};
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/*
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* RealView EB AMBA devices
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*/
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/*
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* These devices are connected via the core APB bridge
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*/
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#define GPIO2_IRQ { IRQ_EB_GPIO2 }
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#define GPIO3_IRQ { IRQ_EB_GPIO3 }
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#define AACI_IRQ { IRQ_EB_AACI }
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#define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
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#define KMI0_IRQ { IRQ_EB_KMI0 }
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#define KMI1_IRQ { IRQ_EB_KMI1 }
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/*
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* These devices are connected directly to the multi-layer AHB switch
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*/
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#define EB_SMC_IRQ { }
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#define MPMC_IRQ { }
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#define EB_CLCD_IRQ { IRQ_EB_CLCD }
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#define DMAC_IRQ { IRQ_EB_DMA }
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/*
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* These devices are connected via the core APB bridge
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*/
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#define SCTL_IRQ { }
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#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG }
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#define EB_GPIO0_IRQ { IRQ_EB_GPIO0 }
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#define GPIO1_IRQ { IRQ_EB_GPIO1 }
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#define EB_RTC_IRQ { IRQ_EB_RTC }
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/*
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* These devices are connected via the DMA APB bridge
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*/
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#define SCI_IRQ { IRQ_EB_SCI }
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#define EB_UART0_IRQ { IRQ_EB_UART0 }
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#define EB_UART1_IRQ { IRQ_EB_UART1 }
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#define EB_UART2_IRQ { IRQ_EB_UART2 }
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#define EB_UART3_IRQ { IRQ_EB_UART3 }
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#define EB_SSP_IRQ { IRQ_EB_SSP }
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/* FPGA Primecells */
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APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
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APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
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APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
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APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
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APB_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL);
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/* DevChip Primecells */
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AHB_DEVICE(smc, "dev:smc", EB_SMC, NULL);
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AHB_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data);
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AHB_DEVICE(dmac, "dev:dmac", DMAC, NULL);
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AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
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APB_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL);
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APB_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data);
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APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
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APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
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APB_DEVICE(rtc, "dev:rtc", EB_RTC, NULL);
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APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
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APB_DEVICE(uart0, "dev:uart0", EB_UART0, NULL);
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APB_DEVICE(uart1, "dev:uart1", EB_UART1, NULL);
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APB_DEVICE(uart2, "dev:uart2", EB_UART2, NULL);
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APB_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data);
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static struct amba_device *amba_devs[] __initdata = {
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&dmac_device,
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&uart0_device,
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&uart1_device,
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&uart2_device,
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&uart3_device,
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&smc_device,
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&clcd_device,
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&sctl_device,
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&wdog_device,
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&gpio0_device,
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&gpio1_device,
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&gpio2_device,
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&rtc_device,
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&sci0_device,
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&ssp0_device,
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&aaci_device,
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&mmc0_device,
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&kmi0_device,
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&kmi1_device,
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};
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/*
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* RealView EB platform devices
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*/
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static struct resource realview_eb_flash_resource = {
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.start = REALVIEW_EB_FLASH_BASE,
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.end = REALVIEW_EB_FLASH_BASE + REALVIEW_EB_FLASH_SIZE - 1,
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.flags = IORESOURCE_MEM,
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};
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static struct resource realview_eb_eth_resources[] = {
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[0] = {
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.start = REALVIEW_EB_ETH_BASE,
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.end = REALVIEW_EB_ETH_BASE + SZ_64K - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_EB_ETH,
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.end = IRQ_EB_ETH,
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.flags = IORESOURCE_IRQ,
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},
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};
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/*
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* Detect and register the correct Ethernet device. RealView/EB rev D
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* platforms use the newer SMSC LAN9118 Ethernet chip
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*/
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static int eth_device_register(void)
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{
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void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K);
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const char *name = NULL;
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u32 idrev;
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if (!eth_addr)
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return -ENOMEM;
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idrev = readl(eth_addr + 0x50);
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if ((idrev & 0xFFFF0000) != 0x01180000)
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/* SMSC LAN9118 not present, use LAN91C111 instead */
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name = "smc91x";
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iounmap(eth_addr);
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return realview_eth_register(name, realview_eb_eth_resources);
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}
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static struct resource realview_eb_isp1761_resources[] = {
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[0] = {
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.start = REALVIEW_EB_USB_BASE,
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.end = REALVIEW_EB_USB_BASE + SZ_128K - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_EB_USB,
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.end = IRQ_EB_USB,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct resource pmu_resources[] = {
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[0] = {
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.start = IRQ_EB11MP_PMU_CPU0,
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.end = IRQ_EB11MP_PMU_CPU0,
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.flags = IORESOURCE_IRQ,
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},
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[1] = {
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.start = IRQ_EB11MP_PMU_CPU1,
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.end = IRQ_EB11MP_PMU_CPU1,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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.start = IRQ_EB11MP_PMU_CPU2,
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.end = IRQ_EB11MP_PMU_CPU2,
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.flags = IORESOURCE_IRQ,
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},
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[3] = {
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.start = IRQ_EB11MP_PMU_CPU3,
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.end = IRQ_EB11MP_PMU_CPU3,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device pmu_device = {
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.name = "arm-pmu",
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.id = ARM_PMU_DEVICE_CPU,
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.num_resources = ARRAY_SIZE(pmu_resources),
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.resource = pmu_resources,
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};
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static struct resource char_lcd_resources[] = {
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{
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.start = REALVIEW_CHAR_LCD_BASE,
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.end = (REALVIEW_CHAR_LCD_BASE + SZ_4K - 1),
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_EB_CHARLCD,
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.end = IRQ_EB_CHARLCD,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device char_lcd_device = {
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.name = "arm-charlcd",
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.id = -1,
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.num_resources = ARRAY_SIZE(char_lcd_resources),
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.resource = char_lcd_resources,
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};
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static void __init gic_init_irq(void)
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{
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if (core_tile_eb11mp() || core_tile_a9mp()) {
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unsigned int pldctrl;
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/* new irq mode */
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writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
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pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
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pldctrl |= 0x00800000;
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writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
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writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
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/* core tile GIC, primary */
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gic_init(0, 29, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE),
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__io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
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#ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
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/* board GIC, secondary */
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gic_init(1, 96, __io_address(REALVIEW_EB_GIC_DIST_BASE),
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__io_address(REALVIEW_EB_GIC_CPU_BASE));
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gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
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#endif
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} else {
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/* board GIC, primary */
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gic_init(0, 29, __io_address(REALVIEW_EB_GIC_DIST_BASE),
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__io_address(REALVIEW_EB_GIC_CPU_BASE));
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}
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}
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/*
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* Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile
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*/
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static void realview_eb11mp_fixup(void)
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{
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/* AMBA devices */
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dmac_device.irq[0] = IRQ_EB11MP_DMA;
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uart0_device.irq[0] = IRQ_EB11MP_UART0;
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uart1_device.irq[0] = IRQ_EB11MP_UART1;
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uart2_device.irq[0] = IRQ_EB11MP_UART2;
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uart3_device.irq[0] = IRQ_EB11MP_UART3;
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clcd_device.irq[0] = IRQ_EB11MP_CLCD;
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wdog_device.irq[0] = IRQ_EB11MP_WDOG;
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gpio0_device.irq[0] = IRQ_EB11MP_GPIO0;
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gpio1_device.irq[0] = IRQ_EB11MP_GPIO1;
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gpio2_device.irq[0] = IRQ_EB11MP_GPIO2;
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rtc_device.irq[0] = IRQ_EB11MP_RTC;
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sci0_device.irq[0] = IRQ_EB11MP_SCI;
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ssp0_device.irq[0] = IRQ_EB11MP_SSP;
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aaci_device.irq[0] = IRQ_EB11MP_AACI;
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mmc0_device.irq[0] = IRQ_EB11MP_MMCI0A;
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mmc0_device.irq[1] = IRQ_EB11MP_MMCI0B;
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kmi0_device.irq[0] = IRQ_EB11MP_KMI0;
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kmi1_device.irq[0] = IRQ_EB11MP_KMI1;
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/* platform devices */
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realview_eb_eth_resources[1].start = IRQ_EB11MP_ETH;
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realview_eb_eth_resources[1].end = IRQ_EB11MP_ETH;
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realview_eb_isp1761_resources[1].start = IRQ_EB11MP_USB;
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realview_eb_isp1761_resources[1].end = IRQ_EB11MP_USB;
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}
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static void __init realview_eb_timer_init(void)
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{
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unsigned int timer_irq;
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timer0_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE);
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timer1_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE) + 0x20;
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timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
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timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;
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if (core_tile_eb11mp() || core_tile_a9mp()) {
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#ifdef CONFIG_LOCAL_TIMERS
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twd_base = __io_address(REALVIEW_EB11MP_TWD_BASE);
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#endif
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timer_irq = IRQ_EB11MP_TIMER0_1;
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} else
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timer_irq = IRQ_EB_TIMER0_1;
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realview_timer_init(timer_irq);
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}
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static struct sys_timer realview_eb_timer = {
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.init = realview_eb_timer_init,
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};
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static void realview_eb_restart(char mode, const char *cmd)
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{
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void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
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void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
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/*
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* To reset, we hit the on-board reset register
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* in the system FPGA
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*/
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__raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
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if (core_tile_eb11mp())
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__raw_writel(0x0008, reset_ctrl);
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dsb();
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}
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static void __init realview_eb_init(void)
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{
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int i;
|
|
|
|
if (core_tile_eb11mp() || core_tile_a9mp()) {
|
|
realview_eb11mp_fixup();
|
|
|
|
#ifdef CONFIG_CACHE_L2X0
|
|
/* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
|
|
* Bits: .... ...0 0111 1001 0000 .... .... .... */
|
|
l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
|
|
#endif
|
|
platform_device_register(&pmu_device);
|
|
}
|
|
|
|
realview_flash_register(&realview_eb_flash_resource, 1);
|
|
platform_device_register(&realview_i2c_device);
|
|
platform_device_register(&char_lcd_device);
|
|
eth_device_register();
|
|
realview_usb_register(realview_eb_isp1761_resources);
|
|
|
|
for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
|
|
struct amba_device *d = amba_devs[i];
|
|
amba_device_register(d, &iomem_resource);
|
|
}
|
|
|
|
#ifdef CONFIG_LEDS
|
|
leds_event = realview_leds_event;
|
|
#endif
|
|
}
|
|
|
|
MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
|
|
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
|
|
.atag_offset = 0x100,
|
|
.fixup = realview_fixup,
|
|
.map_io = realview_eb_map_io,
|
|
.init_early = realview_init_early,
|
|
.init_irq = gic_init_irq,
|
|
.timer = &realview_eb_timer,
|
|
.handle_irq = gic_handle_irq,
|
|
.init_machine = realview_eb_init,
|
|
#ifdef CONFIG_ZONE_DMA
|
|
.dma_zone_size = SZ_256M,
|
|
#endif
|
|
.restart = realview_eb_restart,
|
|
MACHINE_END
|