Alex Deucher 29dbe3bcd2 drm/radeon: allocate PPLLs from low to high ... The order shouldn't matter, but there have been problems reported on certain older asics. This behaves more like the original code before the PPLL allocation rework. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: Markus Trippelsdorf <markus@trippelsdorf.de>		2012-10-15 13:21:00 -04:00
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drm	drm/radeon: allocate PPLLs from low to high	2012-10-15 13:21:00 -04:00
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vga	Merge branch 'pci/yinghai-misc' into next	2012-09-24 17:24:11 -06:00
Makefile