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linux/arch/mips/include/asm/mach-ralink
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Sashka Nochkin 86ce9a340e mips: mt7620: fallback to SDRAM when syscfg0 does not have a valid value for the memory type 
Mediatek MT7620 SoC has syscfg0 bits where it sets the type of memory being used.
However, sometimes those bits are not set properly (reading "11"). In this case, the SoC assumes SDRAM.
The patch below reflects that.

Signed-off-by: Sashka Nochkin <linux-mips@durdom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13135/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13 15:39:43 +02:00
..
mt7620 MIPS: ralink: mt7620: Add cpu-feature-override header 2013-09-04 16:58:31 +02:00
mt7621 MIPS: ralink: add MT7621 support 2016-01-20 00:39:20 +01:00
rt288x MIPS: ralink: add cpu-feature-overrides.h 2013-05-08 01:19:10 +02:00
rt305x MIPS: ralink: add cpu-feature-overrides.h 2013-05-08 01:19:10 +02:00
rt3883 MIPS: ralink: add cpu-feature-overrides.h 2013-05-08 01:19:10 +02:00
irq.h MIPS: ralink: add MT7621 support 2016-01-20 00:39:20 +01:00
mt7620.h mips: mt7620: fallback to SDRAM when syscfg0 does not have a valid value for the memory type 2016-05-13 15:39:43 +02:00
mt7621.h MIPS: Change my email address 2016-05-13 14:02:18 +02:00
pinmux.h MIPS: Change my email address 2016-05-13 14:02:18 +02:00
ralink_regs.h MIPS: Change my email address 2016-05-13 14:02:18 +02:00
rt288x.h MIPS: Change my email address 2016-05-13 14:02:18 +02:00
rt305x.h MIPS: Change my email address 2016-05-13 14:02:18 +02:00
rt3883.h MIPS: ralink: cleanup the soc specific pinmux data 2014-11-24 07:45:24 +01:00