forked from Minki/linux
d8902adcc1
This supported all DMA channels, and it was tested in SH7722, SH7780, SH7785 and SH7763. This can not use with SH DMA API. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Reviewed-by: Matt Fleming <matt@console-pimps.org> Acked-by: Maciej Sosnowski <maciej.sosnowski@intel.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
65 lines
1.9 KiB
C
65 lines
1.9 KiB
C
/*
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* Renesas SuperH DMA Engine support
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*
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* Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
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* Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved.
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*
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* This is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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*/
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#ifndef __DMA_SHDMA_H
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#define __DMA_SHDMA_H
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#include <linux/device.h>
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#include <linux/dmapool.h>
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#include <linux/dmaengine.h>
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#define SH_DMA_TCR_MAX 0x00FFFFFF /* 16MB */
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struct sh_dmae_regs {
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u32 sar; /* SAR / source address */
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u32 dar; /* DAR / destination address */
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u32 tcr; /* TCR / transfer count */
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};
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struct sh_desc {
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struct list_head tx_list;
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struct sh_dmae_regs hw;
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struct list_head node;
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struct dma_async_tx_descriptor async_tx;
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int mark;
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};
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struct sh_dmae_chan {
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dma_cookie_t completed_cookie; /* The maximum cookie completed */
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spinlock_t desc_lock; /* Descriptor operation lock */
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struct list_head ld_queue; /* Link descriptors queue */
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struct list_head ld_free; /* Link descriptors free */
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struct dma_chan common; /* DMA common channel */
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struct device *dev; /* Channel device */
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struct tasklet_struct tasklet; /* Tasklet */
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int descs_allocated; /* desc count */
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int id; /* Raw id of this channel */
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char dev_id[16]; /* unique name per DMAC of channel */
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/* Set chcr */
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int (*set_chcr)(struct sh_dmae_chan *sh_chan, u32 regs);
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/* Set DMA resource */
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int (*set_dmars)(struct sh_dmae_chan *sh_chan, u16 res);
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};
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struct sh_dmae_device {
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struct dma_device common;
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struct sh_dmae_chan *chan[MAX_DMA_CHANNELS];
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struct sh_dmae_pdata pdata;
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};
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#define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan, common)
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#define to_sh_desc(lh) container_of(lh, struct sh_desc, node)
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#define tx_to_sh_desc(tx) container_of(tx, struct sh_desc, async_tx)
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#endif /* __DMA_SHDMA_H */
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