26955c07dc
Devices which utilise DMA use the same device numbers for transmitting and receiving. In this patch we encode the source and destination information into one single attribute. We can subsequently exploit the direction attribute to see which of the transfer directions are being described. This also lessens the burden on platform data. Cc: Dan Williams <djbw@fb.com> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Rabin Vincent <rabin@rab.in> Acked-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
226 lines
5.9 KiB
C
226 lines
5.9 KiB
C
/*
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* Copyright (C) ST-Ericsson SA 2010
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*
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* Author: Hanumath Prasad <hanumath.prasad@stericsson.com>
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* License terms: GNU General Public License (GPL) version 2
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*/
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#include <linux/kernel.h>
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#include <linux/gpio.h>
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#include <linux/amba/bus.h>
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#include <linux/amba/mmci.h>
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#include <linux/mmc/host.h>
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#include <linux/platform_device.h>
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#include <linux/platform_data/dma-ste-dma40.h>
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#include <asm/mach-types.h>
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#include "devices.h"
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#include "db8500-regs.h"
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#include "devices-db8500.h"
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#include "board-mop500.h"
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#include "ste-dma40-db8500.h"
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/*
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* v2 has a new version of this block that need to be forced, the number found
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* in hardware is incorrect
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*/
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#define U8500_SDI_V2_PERIPHID 0x10480180
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/*
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* SDI 0 (MicroSD slot)
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*/
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#ifdef CONFIG_STE_DMA40
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struct stedma40_chan_cfg mop500_sdi0_dma_cfg_rx = {
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.mode = STEDMA40_MODE_LOGICAL,
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.dir = STEDMA40_PERIPH_TO_MEM,
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.dev_type = DB8500_DMA_DEV29_SD_MM0,
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.src_info.data_width = STEDMA40_WORD_WIDTH,
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.dst_info.data_width = STEDMA40_WORD_WIDTH,
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};
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static struct stedma40_chan_cfg mop500_sdi0_dma_cfg_tx = {
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.mode = STEDMA40_MODE_LOGICAL,
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.dir = STEDMA40_MEM_TO_PERIPH,
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.dev_type = DB8500_DMA_DEV29_SD_MM0,
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.src_info.data_width = STEDMA40_WORD_WIDTH,
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.dst_info.data_width = STEDMA40_WORD_WIDTH,
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};
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#endif
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struct mmci_platform_data mop500_sdi0_data = {
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.ocr_mask = MMC_VDD_29_30,
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.f_max = 50000000,
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.capabilities = MMC_CAP_4_BIT_DATA |
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MMC_CAP_SD_HIGHSPEED |
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MMC_CAP_MMC_HIGHSPEED,
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.gpio_wp = -1,
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.sigdir = MCI_ST_FBCLKEN |
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MCI_ST_CMDDIREN |
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MCI_ST_DATA0DIREN |
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MCI_ST_DATA2DIREN,
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#ifdef CONFIG_STE_DMA40
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.dma_filter = stedma40_filter,
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.dma_rx_param = &mop500_sdi0_dma_cfg_rx,
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.dma_tx_param = &mop500_sdi0_dma_cfg_tx,
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#endif
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};
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static void sdi0_configure(struct device *parent)
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{
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/* Add the device, force v2 to subrevision 1 */
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db8500_add_sdi0(parent, &mop500_sdi0_data, U8500_SDI_V2_PERIPHID);
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}
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void mop500_sdi_tc35892_init(struct device *parent)
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{
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mop500_sdi0_data.gpio_cd = GPIO_SDMMC_CD;
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sdi0_configure(parent);
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}
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/*
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* SDI1 (SDIO WLAN)
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*/
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#ifdef CONFIG_STE_DMA40
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static struct stedma40_chan_cfg sdi1_dma_cfg_rx = {
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.mode = STEDMA40_MODE_LOGICAL,
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.dir = STEDMA40_PERIPH_TO_MEM,
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.dev_type = DB8500_DMA_DEV32_SD_MM1,
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.src_info.data_width = STEDMA40_WORD_WIDTH,
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.dst_info.data_width = STEDMA40_WORD_WIDTH,
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};
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static struct stedma40_chan_cfg sdi1_dma_cfg_tx = {
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.mode = STEDMA40_MODE_LOGICAL,
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.dir = STEDMA40_MEM_TO_PERIPH,
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.dev_type = DB8500_DMA_DEV32_SD_MM1,
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.src_info.data_width = STEDMA40_WORD_WIDTH,
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.dst_info.data_width = STEDMA40_WORD_WIDTH,
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};
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#endif
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struct mmci_platform_data mop500_sdi1_data = {
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.ocr_mask = MMC_VDD_29_30,
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.f_max = 50000000,
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.capabilities = MMC_CAP_4_BIT_DATA,
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.gpio_cd = -1,
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.gpio_wp = -1,
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#ifdef CONFIG_STE_DMA40
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.dma_filter = stedma40_filter,
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.dma_rx_param = &sdi1_dma_cfg_rx,
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.dma_tx_param = &sdi1_dma_cfg_tx,
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#endif
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};
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/*
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* SDI 2 (POP eMMC, not on DB8500ed)
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*/
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#ifdef CONFIG_STE_DMA40
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struct stedma40_chan_cfg mop500_sdi2_dma_cfg_rx = {
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.mode = STEDMA40_MODE_LOGICAL,
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.dir = STEDMA40_PERIPH_TO_MEM,
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.dev_type = DB8500_DMA_DEV28_SD_MM2,
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.src_info.data_width = STEDMA40_WORD_WIDTH,
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.dst_info.data_width = STEDMA40_WORD_WIDTH,
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};
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static struct stedma40_chan_cfg mop500_sdi2_dma_cfg_tx = {
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.mode = STEDMA40_MODE_LOGICAL,
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.dir = STEDMA40_MEM_TO_PERIPH,
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.dev_type = DB8500_DMA_DEV28_SD_MM2,
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.src_info.data_width = STEDMA40_WORD_WIDTH,
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.dst_info.data_width = STEDMA40_WORD_WIDTH,
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};
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#endif
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struct mmci_platform_data mop500_sdi2_data = {
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.ocr_mask = MMC_VDD_165_195,
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.f_max = 50000000,
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.capabilities = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA |
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MMC_CAP_MMC_HIGHSPEED,
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.gpio_cd = -1,
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.gpio_wp = -1,
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#ifdef CONFIG_STE_DMA40
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.dma_filter = stedma40_filter,
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.dma_rx_param = &mop500_sdi2_dma_cfg_rx,
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.dma_tx_param = &mop500_sdi2_dma_cfg_tx,
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#endif
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};
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/*
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* SDI 4 (on-board eMMC)
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*/
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#ifdef CONFIG_STE_DMA40
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struct stedma40_chan_cfg mop500_sdi4_dma_cfg_rx = {
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.mode = STEDMA40_MODE_LOGICAL,
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.dir = STEDMA40_PERIPH_TO_MEM,
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.dev_type = DB8500_DMA_DEV42_SD_MM4,
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.src_info.data_width = STEDMA40_WORD_WIDTH,
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.dst_info.data_width = STEDMA40_WORD_WIDTH,
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};
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static struct stedma40_chan_cfg mop500_sdi4_dma_cfg_tx = {
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.mode = STEDMA40_MODE_LOGICAL,
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.dir = STEDMA40_MEM_TO_PERIPH,
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.dev_type = DB8500_DMA_DEV42_SD_MM4,
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.src_info.data_width = STEDMA40_WORD_WIDTH,
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.dst_info.data_width = STEDMA40_WORD_WIDTH,
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};
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#endif
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struct mmci_platform_data mop500_sdi4_data = {
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.ocr_mask = MMC_VDD_29_30,
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.f_max = 50000000,
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.capabilities = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA |
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MMC_CAP_MMC_HIGHSPEED,
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.gpio_cd = -1,
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.gpio_wp = -1,
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#ifdef CONFIG_STE_DMA40
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.dma_filter = stedma40_filter,
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.dma_rx_param = &mop500_sdi4_dma_cfg_rx,
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.dma_tx_param = &mop500_sdi4_dma_cfg_tx,
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#endif
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};
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void __init mop500_sdi_init(struct device *parent)
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{
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/* PoP:ed eMMC */
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db8500_add_sdi2(parent, &mop500_sdi2_data, U8500_SDI_V2_PERIPHID);
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/* On-board eMMC */
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db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
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/*
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* On boards with the TC35892 GPIO expander, sdi0 will finally
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* be added when the TC35892 initializes and calls
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* mop500_sdi_tc35892_init() above.
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*/
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}
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void __init snowball_sdi_init(struct device *parent)
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{
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/* On Snowball MMC_CAP_SD_HIGHSPEED isn't supported (Hardware issue?) */
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mop500_sdi0_data.capabilities &= ~MMC_CAP_SD_HIGHSPEED;
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/* On-board eMMC */
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db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
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/* External Micro SD slot */
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mop500_sdi0_data.gpio_cd = SNOWBALL_SDMMC_CD_GPIO;
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mop500_sdi0_data.cd_invert = true;
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sdi0_configure(parent);
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}
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void __init hrefv60_sdi_init(struct device *parent)
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{
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/* PoP:ed eMMC */
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db8500_add_sdi2(parent, &mop500_sdi2_data, U8500_SDI_V2_PERIPHID);
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/* On-board eMMC */
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db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
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/* External Micro SD slot */
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mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO;
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sdi0_configure(parent);
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/* WLAN SDIO channel */
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db8500_add_sdi1(parent, &mop500_sdi1_data, U8500_SDI_V2_PERIPHID);
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}
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