forked from Minki/linux
42bbdd9922
If CONFIG_OF_ADDRESS is not set and COMPILE_TEST=y, the following
error is seen while building phy-j721e-wiz.c
drivers/phy/ti/phy-j721e-wiz.o: In function `wiz_remove':
phy-j721e-wiz.c:(.text+0x1a): undefined reference to
`of_platform_device_destroy'
Fix the config dependency for PHY_J721E_WIZ here.
Reported-by: Hulk Robot <hulkci@huawei.com>
Fixes: 091876cc35 ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC")
Signed-off-by: Hongbo Yao <yaohongbo@huawei.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20200117212310.2864-1-kishon@ti.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
117 lines
3.5 KiB
Plaintext
117 lines
3.5 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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#
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# Phy drivers for TI platforms
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#
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config PHY_DA8XX_USB
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tristate "TI DA8xx USB PHY Driver"
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depends on ARCH_DAVINCI_DA8XX || COMPILE_TEST
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select GENERIC_PHY
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select MFD_SYSCON
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help
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Enable this to support the USB PHY on DA8xx SoCs.
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This driver controls both the USB 1.1 PHY and the USB 2.0 PHY.
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config PHY_DM816X_USB
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tristate "TI dm816x USB PHY driver"
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depends on ARCH_OMAP2PLUS || COMPILE_TEST
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depends on USB_SUPPORT
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select GENERIC_PHY
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select USB_PHY
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help
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Enable this for dm816x USB to work.
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config PHY_AM654_SERDES
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tristate "TI AM654 SERDES support"
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depends on OF && ARCH_K3 || COMPILE_TEST
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depends on COMMON_CLK
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select GENERIC_PHY
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select MULTIPLEXER
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select REGMAP_MMIO
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select MUX_MMIO
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help
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This option enables support for TI AM654 SerDes PHY used for
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PCIe.
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config PHY_J721E_WIZ
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tristate "TI J721E WIZ (SERDES Wrapper) support"
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depends on OF && ARCH_K3 || COMPILE_TEST
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depends on HAS_IOMEM && OF_ADDRESS
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depends on COMMON_CLK
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select GENERIC_PHY
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select MULTIPLEXER
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select REGMAP_MMIO
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select MUX_MMIO
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help
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This option enables support for WIZ module present in TI's J721E
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SoC. WIZ is a serdes wrapper used to configure some of the input
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signals to the SERDES (Sierra/Torrent). This driver configures
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three clock selects (pll0, pll1, dig) and resets for each of the
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lanes.
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config OMAP_CONTROL_PHY
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tristate "OMAP CONTROL PHY Driver"
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depends on ARCH_OMAP2PLUS || COMPILE_TEST
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help
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Enable this to add support for the PHY part present in the control
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module. This driver has API to power on the USB2 PHY and to write to
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the mailbox. The mailbox is present only in omap4 and the register to
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power on the USB2 PHY is present in OMAP4 and OMAP5. OMAP5 has an
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additional register to power on USB3 PHY/SATA PHY/PCIE PHY
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(PIPE3 PHY).
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config OMAP_USB2
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tristate "OMAP USB2 PHY Driver"
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depends on ARCH_OMAP2PLUS || ARCH_K3
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depends on USB_SUPPORT
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select GENERIC_PHY
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select USB_PHY
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select OMAP_CONTROL_PHY if ARCH_OMAP2PLUS || COMPILE_TEST
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help
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Enable this to support the transceiver that is part of SOC. This
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driver takes care of all the PHY functionality apart from comparator.
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The USB OTG controller communicates with the comparator using this
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driver.
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config TI_PIPE3
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tristate "TI PIPE3 PHY Driver"
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depends on ARCH_OMAP2PLUS || COMPILE_TEST
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select GENERIC_PHY
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select OMAP_CONTROL_PHY
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help
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Enable this to support the PIPE3 PHY that is part of TI SOCs. This
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driver takes care of all the PHY functionality apart from comparator.
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This driver interacts with the "OMAP Control PHY Driver" to power
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on/off the PHY.
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config PHY_TUSB1210
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tristate "TI TUSB1210 ULPI PHY module"
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depends on USB_ULPI_BUS
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select GENERIC_PHY
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help
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Support for TI TUSB1210 USB ULPI PHY.
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config TWL4030_USB
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tristate "TWL4030 USB Transceiver Driver"
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depends on TWL4030_CORE && REGULATOR_TWL4030 && USB_MUSB_OMAP2PLUS
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depends on USB_SUPPORT
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depends on USB_GADGET || !USB_GADGET # if USB_GADGET=m, this can't 'y'
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select GENERIC_PHY
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select USB_PHY
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help
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Enable this to support the USB OTG transceiver on TWL4030
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family chips (including the TWL5030 and TPS659x0 devices).
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This transceiver supports high and full speed devices plus,
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in host mode, low speed.
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config PHY_TI_GMII_SEL
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tristate
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default y if TI_CPSW=y || TI_CPSW_SWITCHDEV=y
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depends on TI_CPSW || TI_CPSW_SWITCHDEV || COMPILE_TEST
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select GENERIC_PHY
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select REGMAP
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default m
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help
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This driver supports configuring of the TI CPSW Port mode depending on
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the Ethernet PHY connected to the CPSW Port.
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