forked from Minki/linux
24d3194a2c
VC channel configuration is programmed based on settings coming from the PMIC configuration. Currently, the VC channel to PMIC mapping is a simple one-to-one mapping. Whenever a VC channel parameter is configured (i2c slave addres, PMIC register address, on/ret/off command), the corresponding bits are enabled in the VC channel configuration register. If necessary, the programmability of channel configuration settings could be extended to board/PMIC files, however, because this patch changes the channel configuration to be programmed based on existing values from the PMIC settings, it may not be required. Also note that starting with OMAP4, where there are more than 2 channels, one channel is identified as the "default" channel. When any of the bits in the channel config for the other channels are zero, it means to use the default channel. The OMAP4 TRM (at least through NDA version Q) is wrong in describing which is the default channel. The default channel on OMAP4 is MPU, not CORE as decribed in the TRM. Signed-off-by: Kevin Hilman <khilman@ti.com>
113 lines
3.6 KiB
C
113 lines
3.6 KiB
C
/*
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* OMAP3/4 Voltage Controller (VC) structure and macro definitions
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*
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* Copyright (C) 2007, 2010 Texas Instruments, Inc.
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* Rajendra Nayak <rnayak@ti.com>
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* Lesly A M <x0080970@ti.com>
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* Thara Gopinath <thara@ti.com>
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*
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* Copyright (C) 2008, 2011 Nokia Corporation
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* Kalle Jokiniemi
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* Paul Walmsley
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version
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* 2 as published by the Free Software Foundation.
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*/
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#ifndef __ARCH_ARM_MACH_OMAP2_VC_H
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#define __ARCH_ARM_MACH_OMAP2_VC_H
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#include <linux/kernel.h>
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struct voltagedomain;
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/**
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* struct omap_vc_common - per-VC register/bitfield data
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* @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register
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* @valid: VALID bitmask in PRM_VC_BYPASS_VAL register
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* @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start
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* @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start
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* @smps_cmdra_reg: Offset of PRM_VC_SMPS_CMD_RA reg from PRM start
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* @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start
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* @data_shift: DATA field shift in PRM_VC_BYPASS_VAL register
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* @slaveaddr_shift: SLAVEADDR field shift in PRM_VC_BYPASS_VAL register
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* @regaddr_shift: REGADDR field shift in PRM_VC_BYPASS_VAL register
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* @cmd_on_shift: ON field shift in PRM_VC_CMD_VAL_* register
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* @cmd_onlp_shift: ONLP field shift in PRM_VC_CMD_VAL_* register
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* @cmd_ret_shift: RET field shift in PRM_VC_CMD_VAL_* register
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* @cmd_off_shift: OFF field shift in PRM_VC_CMD_VAL_* register
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*
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* XXX One of cmd_on_mask and cmd_on_shift are not needed
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* XXX VALID should probably be a shift, not a mask
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*/
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struct omap_vc_common {
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u32 cmd_on_mask;
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u32 valid;
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u8 smps_sa_reg;
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u8 smps_volra_reg;
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u8 smps_cmdra_reg;
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u8 bypass_val_reg;
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u8 data_shift;
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u8 slaveaddr_shift;
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u8 regaddr_shift;
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u8 cmd_on_shift;
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u8 cmd_onlp_shift;
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u8 cmd_ret_shift;
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u8 cmd_off_shift;
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u8 cfg_channel_reg;
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};
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/* omap_vc_channel.flags values */
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#define OMAP_VC_CHANNEL_DEFAULT BIT(0)
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/**
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* struct omap_vc_channel - VC per-instance data
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* @i2c_slave_addr: I2C slave address of PMIC for this VC channel
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* @volt_reg_addr: voltage configuration register address
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* @cmd_reg_addr: command configuration register address
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* @setup_time: setup time (in sys_clk cycles) of regulator for this channel
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* @common: pointer to VC common data for this platform
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* @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register
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* @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register
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* @smps_cmdra_mask: CMDRA* bitmask in the PRM_VC_CMD_RA register
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* @cmdval_reg: register for on/ret/off voltage level values for this channel
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* @flags: VC channel-specific flags (optional)
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*/
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struct omap_vc_channel {
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/* channel state */
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u16 i2c_slave_addr;
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u16 volt_reg_addr;
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u16 cmd_reg_addr;
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u16 setup_time;
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u8 cfg_channel;
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/* register access data */
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const struct omap_vc_common *common;
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u32 smps_sa_mask;
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u32 smps_volra_mask;
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u32 smps_cmdra_mask;
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u8 cmdval_reg;
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u8 cfg_channel_sa_shift;
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u8 flags;
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};
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extern struct omap_vc_channel omap3_vc_mpu;
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extern struct omap_vc_channel omap3_vc_core;
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extern struct omap_vc_channel omap4_vc_mpu;
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extern struct omap_vc_channel omap4_vc_iva;
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extern struct omap_vc_channel omap4_vc_core;
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void omap_vc_init_channel(struct voltagedomain *voltdm);
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int omap_vc_pre_scale(struct voltagedomain *voltdm,
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unsigned long target_volt,
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u8 *target_vsel, u8 *current_vsel);
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void omap_vc_post_scale(struct voltagedomain *voltdm,
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unsigned long target_volt,
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u8 target_vsel, u8 current_vsel);
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int omap_vc_bypass_scale(struct voltagedomain *voltdm,
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unsigned long target_volt);
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#endif
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