forked from Minki/linux
e90937e756
As usual, device tree updates is the bulk of our material in this merge window. This time around, 559 patches affecting both 32- and 64-bit platforms. Changes are too many to list individually, but some of the larger ones: New platform/SoC support: - Automotive: + Renesas R-Car D3 (R8A77995) + TI DT76x + MediaTek mt2712e - Communication-oriented: + Qualcomm IPQ8074 + Broadcom Stingray + Marvell Armada 8080 - Set top box: + Uniphier PXs3 Besides some vendor reference boards for the SoC above, there are also several new boards/machines: - TI AM335x Moxa UC-8100-ME-T open platform - TI AM57xx Beaglebone X15 Rev C - Microchip/Atmel sama5d27 SoM1 EK - Broadcom Raspberry Pi Zero W - Gemini-based D-Link DIR-685 router - Freescale i.MX6: + Toradex Apalis module + Apalis and Ixora carrier boards + Engicam GEAM6UL Starter Kit - Freescale i.MX53-based Beckhoff CX9020 Embedded PC - Mediatek mt7623-based BananaPi R2 - Several Allwinner-based single-board computers: + Cubietruck plus + Bananapi M3, M2M and M64 + NanoPi A64 + A64-OLinuXino + Pine64 - Rockchip RK3328 Pine64/Rock64 board support - Rockchip RK3399 boards: + RK3399 Sapphire module on Excavator carrier (RK3399 reference design) + Theobroma Systems RK3399-Q7 SoM - ZTE ZX296718 PCBOX Board -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJZtdtjAAoJEIwa5zzehBx3PzgP/iCQyUk5wklG9E5YNl8a9m/o djBkelabTm52s5ZTu6Awsq5rx8jUMqcb0vo+9v9yPWFG6On2oTZyZ/rE1Wbj3+gG +ENVyRgxmzYDTXqQLiu1UOV9wSA0gHwQCRZvE7i32NNfLu+tAsvu9e/AuznQ1xhR 4G7dGCRRlRkZkrVKrJ7JjklmW578pFQkZLmz8K2nWqwh1tKpK3fY19SrwUKx+YCR tnMPYAPjB5zxR9tfcDS4FUKdiC7dMiMzZNGiYl5a26X6wsNR7xYtNzFMaGZn1ecG PwOS+DAnj8J+AfpQBLWu9xytHbJdqITRuNcF+OXNVW9TKmb0syf7VgRUDkhjIMxP aGZc4Q6PwgTRwnX+w6fTzJTyk+uXtieCicZaaZ1jlgcQq0pfbzJ1vZMpq4aoVlxU mS84i1bd8AiavmHuyIRNB3/T4aAsVhTUIBndXluKV8yWroXhAukfI1YmGr1Eux7C fy5pPeDqk9lXR3bqIhfnaLoVsApEXTOWMC8X48vwfaQHiCGR9JJwpfsGcaNi1bri Col1qRzkXWGA6KqTWtpo+o12rYuMGc0mpZTCmejKuBoxMXOU+wLyJYgaxa7pyesX S5rLaIe2l9ppXHjjEERp7AzczzLS5W20Tez5vYnZAQb1dYuJzwXwiATt8NT+XG3V Wu92UwUfjxYk8vGz48ph =R45j -----END PGP SIGNATURE----- Merge tag 'armsoc-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM/arm64 Devicetree updates from Olof Johansson: "As usual, device tree updates is the bulk of our material in this merge window. This time around, 559 patches affecting both 32- and 64-bit platforms. Changes are too many to list individually, but some of the larger ones: New platform/SoC support: - Automotive: + Renesas R-Car D3 (R8A77995) + TI DT76x + MediaTek mt2712e - Communication-oriented: + Qualcomm IPQ8074 + Broadcom Stingray + Marvell Armada 8080 - Set top box: + Uniphier PXs3 Besides some vendor reference boards for the SoC above, there are also several new boards/machines: - TI AM335x Moxa UC-8100-ME-T open platform - TI AM57xx Beaglebone X15 Rev C - Microchip/Atmel sama5d27 SoM1 EK - Broadcom Raspberry Pi Zero W - Gemini-based D-Link DIR-685 router - Freescale i.MX6: + Toradex Apalis module + Apalis and Ixora carrier boards + Engicam GEAM6UL Starter Kit - Freescale i.MX53-based Beckhoff CX9020 Embedded PC - Mediatek mt7623-based BananaPi R2 - Several Allwinner-based single-board computers: + Cubietruck plus + Bananapi M3, M2M and M64 + NanoPi A64 + A64-OLinuXino + Pine64 - Rockchip RK3328 Pine64/Rock64 board support - Rockchip RK3399 boards: + RK3399 Sapphire module on Excavator carrier (RK3399 reference design) + Theobroma Systems RK3399-Q7 SoM - ZTE ZX296718 PCBOX Board" * tag 'armsoc-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (559 commits) ARM: dts: at91: at91sam9g45: add AC97 arm64: dts: marvell: mcbin: enable more networking ports arm64: dts: marvell: add a reference to the sysctrl syscon in the ppv2 node arm64: dts: marvell: add TX interrupts for PPv2.2 arm64: dts: uniphier: add PXs3 SoC support ARM: dts: uniphier: add pinctrl groups of ethernet phy mode ARM: dts: uniphier: fix size of sdctrl nodes ARM: dts: uniphier: add AIDET nodes arm64: dts: uniphier: fix size of sdctrl node arm64: dts: uniphier: add AIDET nodes Revert "ARM: dts: sun8i: h3: Enable dwmac-sun8i on the Beelink X2" arm64: dts: uniphier: add reset controller node of analog amplifier arm64: dts: marvell: add Device Tree files for Armada-8KP arm64: dts: rockchip: add Haikou baseboard with RK3399-Q7 SoM arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM dt-bindings: add rk3399-q7 SoM ARM: dts: rockchip: enable usb for rv1108-evb ARM: dts: rockchip: add usb nodes for rv1108 SoCs dt-bindings: update grf-binding for rv1108 SoCs ARM: dts: aspeed-g4: fix AHB window size of the SMC controllers ...
1210 lines
27 KiB
Plaintext
1210 lines
27 KiB
Plaintext
/*
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* SAMSUNG Exynos5433 TM2 board device tree source
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*
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* Copyright (c) 2016 Samsung Electronics Co., Ltd.
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*
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* Common device tree source file for Samsung's TM2 and TM2E boards
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* which are based on Samsung Exynos5433 SoC.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "exynos5433.dtsi"
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#include <dt-bindings/clock/samsung,s2mps11.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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aliases {
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gsc0 = &gsc_0;
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gsc1 = &gsc_1;
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gsc2 = &gsc_2;
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pinctrl0 = &pinctrl_alive;
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pinctrl1 = &pinctrl_aud;
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pinctrl2 = &pinctrl_cpif;
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pinctrl3 = &pinctrl_ese;
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pinctrl4 = &pinctrl_finger;
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pinctrl5 = &pinctrl_fsys;
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pinctrl6 = &pinctrl_imem;
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pinctrl7 = &pinctrl_nfc;
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pinctrl8 = &pinctrl_peric;
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pinctrl9 = &pinctrl_touch;
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serial0 = &serial_0;
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serial1 = &serial_1;
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serial2 = &serial_2;
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serial3 = &serial_3;
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spi0 = &spi_0;
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spi1 = &spi_1;
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spi2 = &spi_2;
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spi3 = &spi_3;
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spi4 = &spi_4;
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mshc0 = &mshc_0;
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mshc2 = &mshc_2;
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};
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chosen {
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stdout-path = &serial_1;
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};
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memory@20000000 {
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device_type = "memory";
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reg = <0x0 0x20000000 0x0 0xc0000000>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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power-key {
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gpios = <&gpa2 7 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_POWER>;
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label = "power key";
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debounce-interval = <10>;
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};
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volume-up-key {
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gpios = <&gpa2 0 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_VOLUMEUP>;
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label = "volume-up key";
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debounce-interval = <10>;
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};
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volume-down-key {
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gpios = <&gpa2 1 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_VOLUMEDOWN>;
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label = "volume-down key";
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debounce-interval = <10>;
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};
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homepage-key {
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gpios = <&gpa0 3 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_MENU>;
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label = "homepage key";
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debounce-interval = <10>;
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};
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};
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i2c_max98504: i2c-gpio-0 {
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compatible = "i2c-gpio";
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gpios = <&gpd0 1 GPIO_ACTIVE_HIGH /* SPK_AMP_SDA */
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&gpd0 0 GPIO_ACTIVE_HIGH /* SPK_AMP_SCL */ >;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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max98504: max98504@31 {
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compatible = "maxim,max98504";
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reg = <0x31>;
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maxim,rx-path = <1>;
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maxim,tx-path = <1>;
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maxim,tx-channel-mask = <3>;
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maxim,tx-channel-source = <2>;
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};
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};
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irda_regulator: irda-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpr3 3 GPIO_ACTIVE_HIGH>;
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regulator-name = "irda_regulator";
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};
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sound {
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compatible = "samsung,tm2-audio";
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audio-codec = <&wm5110>;
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i2s-controller = <&i2s0>;
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audio-amplifier = <&max98504>;
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mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>;
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model = "wm5110";
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samsung,audio-routing =
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/* Headphone */
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"HP", "HPOUT1L",
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"HP", "HPOUT1R",
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/* Speaker */
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"SPK", "SPKOUT",
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"SPKOUT", "HPOUT2L",
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"SPKOUT", "HPOUT2R",
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/* Receiver */
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"RCV", "HPOUT3L",
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"RCV", "HPOUT3R";
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status = "okay";
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};
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};
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&adc {
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vdd-supply = <&ldo3_reg>;
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status = "okay";
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thermistor-ap {
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compatible = "murata,ncp03wf104";
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pullup-uv = <1800000>;
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pullup-ohm = <100000>;
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pulldown-ohm = <0>;
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io-channels = <&adc 0>;
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};
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thermistor-battery {
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compatible = "murata,ncp03wf104";
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pullup-uv = <1800000>;
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pullup-ohm = <100000>;
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pulldown-ohm = <0>;
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io-channels = <&adc 1>;
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#thermal-sensor-cells = <0>;
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};
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thermistor-charger {
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compatible = "murata,ncp03wf104";
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pullup-uv = <1800000>;
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pullup-ohm = <100000>;
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pulldown-ohm = <0>;
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io-channels = <&adc 2>;
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};
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};
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&bus_g2d_400 {
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devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>;
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vdd-supply = <&buck4_reg>;
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exynos,saturation-ratio = <10>;
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status = "okay";
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};
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&bus_g2d_266 {
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devfreq = <&bus_g2d_400>;
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status = "okay";
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};
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&bus_gscl {
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devfreq = <&bus_g2d_400>;
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status = "okay";
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};
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&bus_hevc {
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devfreq = <&bus_g2d_400>;
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status = "okay";
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};
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&bus_jpeg {
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devfreq = <&bus_g2d_400>;
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status = "okay";
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};
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&bus_mfc {
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devfreq = <&bus_g2d_400>;
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status = "okay";
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};
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&bus_mscl {
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devfreq = <&bus_g2d_400>;
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status = "okay";
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};
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&bus_noc0 {
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devfreq = <&bus_g2d_400>;
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status = "okay";
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};
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&bus_noc1 {
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devfreq = <&bus_g2d_400>;
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status = "okay";
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};
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&bus_noc2 {
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devfreq = <&bus_g2d_400>;
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status = "okay";
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};
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&cmu_aud {
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assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>;
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assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>;
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};
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&cmu_fsys {
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assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>,
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<&cmu_top CLK_MOUT_SCLK_USBHOST30>,
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<&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>,
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<&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>,
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<&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>,
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<&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>,
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<&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>,
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<&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>,
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<&cmu_top CLK_DIV_SCLK_USBDRD30>,
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<&cmu_top CLK_DIV_SCLK_USBHOST30>;
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assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>,
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<&cmu_top CLK_MOUT_BUS_PLL_USER>,
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<&cmu_top CLK_SCLK_USBDRD30_FSYS>,
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<&cmu_top CLK_SCLK_USBHOST30_FSYS>,
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<&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>,
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<&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>,
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<&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>,
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<&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>;
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assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
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<66700000>, <66700000>;
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};
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&cmu_gscl {
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assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
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<&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
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assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
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<&cmu_top CLK_ACLK_GSCL_333>;
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};
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&cmu_mfc {
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assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>;
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assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>;
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};
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&cmu_mscl {
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assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>,
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<&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
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<&cmu_mscl CLK_MOUT_SCLK_JPEG>,
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<&cmu_top CLK_MOUT_SCLK_JPEG_A>;
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assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>,
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<&cmu_top CLK_SCLK_JPEG_MSCL>,
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<&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
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<&cmu_top CLK_MOUT_BUS_PLL_USER>;
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};
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&cpu0 {
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cpu-supply = <&buck3_reg>;
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};
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&cpu4 {
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cpu-supply = <&buck2_reg>;
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};
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&decon {
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status = "okay";
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};
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&decon_tv {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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tv_to_hdmi: endpoint {
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remote-endpoint = <&hdmi_to_tv>;
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};
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};
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};
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};
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&dsi {
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status = "okay";
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vddcore-supply = <&ldo6_reg>;
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vddio-supply = <&ldo7_reg>;
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samsung,burst-clock-frequency = <512000000>;
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samsung,esc-clock-frequency = <16000000>;
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samsung,pll-clock-frequency = <24000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&te_irq>;
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};
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&hdmi {
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hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>;
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status = "okay";
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vdd-supply = <&ldo6_reg>;
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vdd_osc-supply = <&ldo7_reg>;
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vdd_pll-supply = <&ldo6_reg>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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hdmi_to_tv: endpoint {
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remote-endpoint = <&tv_to_hdmi>;
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};
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};
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port@1 {
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reg = <1>;
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hdmi_to_mhl: endpoint {
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remote-endpoint = <&mhl_to_hdmi>;
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};
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};
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};
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};
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&hsi2c_0 {
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status = "okay";
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clock-frequency = <2500000>;
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s2mps13-pmic@66 {
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compatible = "samsung,s2mps13-pmic";
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interrupt-parent = <&gpa0>;
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interrupts = <7 IRQ_TYPE_NONE>;
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reg = <0x66>;
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samsung,s2mps11-wrstbi-ground;
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s2mps13_osc: clocks {
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compatible = "samsung,s2mps13-clk";
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#clock-cells = <1>;
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clock-output-names = "s2mps13_ap", "s2mps13_cp",
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"s2mps13_bt";
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};
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regulators {
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ldo1_reg: LDO1 {
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regulator-name = "VDD_ALIVE_0.9V_AP";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-always-on;
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};
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ldo2_reg: LDO2 {
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regulator-name = "VDDQ_MMC2_2.8V_AP";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-always-on;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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ldo3_reg: LDO3 {
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regulator-name = "VDD1_E_1.8V_AP";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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ldo4_reg: LDO4 {
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regulator-name = "VDD10_MIF_PLL_1.0V_AP";
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regulator-min-microvolt = <1300000>;
|
|
regulator-max-microvolt = <1300000>;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
ldo5_reg: LDO5 {
|
|
regulator-name = "VDD10_DPLL_1.0V_AP";
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <1000000>;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
ldo6_reg: LDO6 {
|
|
regulator-name = "VDD10_MIPI2L_1.0V_AP";
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <1000000>;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
ldo7_reg: LDO7 {
|
|
regulator-name = "VDD18_MIPI2L_1.8V_AP";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
ldo8_reg: LDO8 {
|
|
regulator-name = "VDD18_LLI_1.8V_AP";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
ldo9_reg: LDO9 {
|
|
regulator-name = "VDD18_ABB_ETC_1.8V_AP";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
ldo10_reg: LDO10 {
|
|
regulator-name = "VDD33_USB30_3.0V_AP";
|
|
regulator-min-microvolt = <3000000>;
|
|
regulator-max-microvolt = <3000000>;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
ldo11_reg: LDO11 {
|
|
regulator-name = "VDD_INT_M_1.0V_AP";
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <1000000>;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
ldo12_reg: LDO12 {
|
|
regulator-name = "VDD_KFC_M_1.1V_AP";
|
|
regulator-min-microvolt = <800000>;
|
|
regulator-max-microvolt = <1350000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo13_reg: LDO13 {
|
|
regulator-name = "VDD_G3D_M_0.95V_AP";
|
|
regulator-min-microvolt = <950000>;
|
|
regulator-max-microvolt = <950000>;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
ldo14_reg: LDO14 {
|
|
regulator-name = "VDDQ_M1_LDO_1.2V_AP";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
ldo15_reg: LDO15 {
|
|
regulator-name = "VDDQ_M2_LDO_1.2V_AP";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
ldo16_reg: LDO16 {
|
|
regulator-name = "VDDQ_EFUSE";
|
|
regulator-min-microvolt = <1400000>;
|
|
regulator-max-microvolt = <3400000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo17_reg: LDO17 {
|
|
regulator-name = "V_TFLASH_2.8V_AP";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
};
|
|
|
|
ldo18_reg: LDO18 {
|
|
regulator-name = "V_CODEC_1.8V_AP";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
};
|
|
|
|
ldo19_reg: LDO19 {
|
|
regulator-name = "VDDA_1.8V_COMP";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo20_reg: LDO20 {
|
|
regulator-name = "VCC_2.8V_AP";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo21_reg: LDO21 {
|
|
regulator-name = "VT_CAM_1.8V";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
};
|
|
|
|
ldo22_reg: LDO22 {
|
|
regulator-name = "CAM_IO_1.8V_AP";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
};
|
|
|
|
ldo23_reg: LDO23 {
|
|
regulator-name = "CAM_SEN_CORE_1.05V_AP";
|
|
regulator-min-microvolt = <1050000>;
|
|
regulator-max-microvolt = <1050000>;
|
|
};
|
|
|
|
ldo24_reg: LDO24 {
|
|
regulator-name = "VT_CAM_1.2V";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
};
|
|
|
|
ldo25_reg: LDO25 {
|
|
regulator-name = "UNUSED_LDO25";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
};
|
|
|
|
ldo26_reg: LDO26 {
|
|
regulator-name = "CAM_AF_2.8V_AP";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
};
|
|
|
|
ldo27_reg: LDO27 {
|
|
regulator-name = "VCC_3.0V_LCD_AP";
|
|
regulator-min-microvolt = <3000000>;
|
|
regulator-max-microvolt = <3000000>;
|
|
};
|
|
|
|
ldo28_reg: LDO28 {
|
|
regulator-name = "VCC_1.8V_LCD_AP";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
};
|
|
|
|
ldo29_reg: LDO29 {
|
|
regulator-name = "VT_CAM_2.8V";
|
|
regulator-min-microvolt = <3000000>;
|
|
regulator-max-microvolt = <3000000>;
|
|
};
|
|
|
|
ldo30_reg: LDO30 {
|
|
regulator-name = "TSP_AVDD_3.3V_AP";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
};
|
|
|
|
ldo31_reg: LDO31 {
|
|
/*
|
|
* LDO31 differs from target to target,
|
|
* its definition is in the .dts
|
|
*/
|
|
};
|
|
|
|
ldo32_reg: LDO32 {
|
|
regulator-name = "VTOUCH_1.8V_AP";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
};
|
|
|
|
ldo33_reg: LDO33 {
|
|
regulator-name = "VTOUCH_LED_3.3V";
|
|
regulator-min-microvolt = <2500000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-ramp-delay = <12500>;
|
|
};
|
|
|
|
ldo34_reg: LDO34 {
|
|
regulator-name = "VCC_1.8V_MHL_AP";
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <2100000>;
|
|
};
|
|
|
|
ldo35_reg: LDO35 {
|
|
regulator-name = "OIS_VM_2.8V";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
};
|
|
|
|
ldo36_reg: LDO36 {
|
|
regulator-name = "VSIL_1.0V";
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <1000000>;
|
|
};
|
|
|
|
ldo37_reg: LDO37 {
|
|
regulator-name = "VF_1.8V";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
};
|
|
|
|
ldo38_reg: LDO38 {
|
|
/*
|
|
* LDO38 differs from target to target,
|
|
* its definition is in the .dts
|
|
*/
|
|
};
|
|
|
|
ldo39_reg: LDO39 {
|
|
regulator-name = "V_HRM_1.8V";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
};
|
|
|
|
ldo40_reg: LDO40 {
|
|
regulator-name = "V_HRM_3.3V";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
};
|
|
|
|
buck1_reg: BUCK1 {
|
|
regulator-name = "VDD_MIF_0.9V_AP";
|
|
regulator-min-microvolt = <600000>;
|
|
regulator-max-microvolt = <1500000>;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
buck2_reg: BUCK2 {
|
|
regulator-name = "VDD_EGL_1.0V_AP";
|
|
regulator-min-microvolt = <900000>;
|
|
regulator-max-microvolt = <1300000>;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
buck3_reg: BUCK3 {
|
|
regulator-name = "VDD_KFC_1.0V_AP";
|
|
regulator-min-microvolt = <800000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
buck4_reg: BUCK4 {
|
|
regulator-name = "VDD_INT_0.95V_AP";
|
|
regulator-min-microvolt = <600000>;
|
|
regulator-max-microvolt = <1500000>;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
buck5_reg: BUCK5 {
|
|
regulator-name = "VDD_DISP_CAM0_0.9V_AP";
|
|
regulator-min-microvolt = <600000>;
|
|
regulator-max-microvolt = <1500000>;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
buck6_reg: BUCK6 {
|
|
regulator-name = "VDD_G3D_0.9V_AP";
|
|
regulator-min-microvolt = <600000>;
|
|
regulator-max-microvolt = <1500000>;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
buck7_reg: BUCK7 {
|
|
regulator-name = "VDD_MEM1_1.2V_AP";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
buck8_reg: BUCK8 {
|
|
regulator-name = "VDD_LLDO_1.35V_AP";
|
|
regulator-min-microvolt = <1350000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
buck9_reg: BUCK9 {
|
|
regulator-name = "VDD_MLDO_2.0V_AP";
|
|
regulator-min-microvolt = <1350000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
buck10_reg: BUCK10 {
|
|
regulator-name = "vdd_mem2";
|
|
regulator-min-microvolt = <550000>;
|
|
regulator-max-microvolt = <1500000>;
|
|
regulator-always-on;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&hsi2c_5 {
|
|
status = "okay";
|
|
|
|
stmfts: touchscreen@49 {
|
|
compatible = "st,stmfts";
|
|
reg = <0x49>;
|
|
interrupt-parent = <&gpa1>;
|
|
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
|
|
avdd-supply = <&ldo30_reg>;
|
|
vdd-supply = <&ldo31_reg>;
|
|
};
|
|
};
|
|
|
|
&hsi2c_7 {
|
|
status = "okay";
|
|
|
|
sii8620@39 {
|
|
reg = <0x39>;
|
|
compatible = "sil,sii8620";
|
|
cvcc10-supply = <&ldo36_reg>;
|
|
iovcc18-supply = <&ldo34_reg>;
|
|
interrupt-parent = <&gpf0>;
|
|
interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
|
|
reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>;
|
|
clocks = <&pmu_system_controller 0>;
|
|
clock-names = "xtal";
|
|
|
|
port {
|
|
mhl_to_hdmi: endpoint {
|
|
remote-endpoint = <&hdmi_to_mhl>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&hsi2c_8 {
|
|
status = "okay";
|
|
|
|
max77843@66 {
|
|
compatible = "maxim,max77843";
|
|
interrupt-parent = <&gpa1>;
|
|
interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
|
|
reg = <0x66>;
|
|
|
|
muic: max77843-muic {
|
|
compatible = "maxim,max77843-muic";
|
|
};
|
|
|
|
regulators {
|
|
compatible = "maxim,max77843-regulator";
|
|
safeout1_reg: SAFEOUT1 {
|
|
regulator-name = "SAFEOUT1";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <4950000>;
|
|
};
|
|
|
|
safeout2_reg: SAFEOUT2 {
|
|
regulator-name = "SAFEOUT2";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <4950000>;
|
|
};
|
|
|
|
charger_reg: CHARGER {
|
|
regulator-name = "CHARGER";
|
|
regulator-min-microamp = <100000>;
|
|
regulator-max-microamp = <3150000>;
|
|
};
|
|
};
|
|
|
|
haptic: max77843-haptic {
|
|
compatible = "maxim,max77843-haptic";
|
|
haptic-supply = <&ldo38_reg>;
|
|
pwms = <&pwm 0 33670 0>;
|
|
pwm-names = "haptic";
|
|
};
|
|
};
|
|
};
|
|
|
|
&hsi2c_11 {
|
|
status = "okay";
|
|
};
|
|
|
|
&i2s0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&mshc_0 {
|
|
status = "okay";
|
|
mmc-hs200-1_8v;
|
|
mmc-hs400-1_8v;
|
|
cap-mmc-highspeed;
|
|
non-removable;
|
|
card-detect-delay = <200>;
|
|
samsung,dw-mshc-ciu-div = <3>;
|
|
samsung,dw-mshc-sdr-timing = <0 4>;
|
|
samsung,dw-mshc-ddr-timing = <0 2>;
|
|
samsung,dw-mshc-hs400-timing = <0 3>;
|
|
samsung,read-strobe-delay = <90>;
|
|
fifo-depth = <0x80>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4
|
|
&sd0_bus8 &sd0_rdqs>;
|
|
bus-width = <8>;
|
|
assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>;
|
|
assigned-clock-rates = <800000000>;
|
|
};
|
|
|
|
&mshc_2 {
|
|
status = "okay";
|
|
cap-sd-highspeed;
|
|
disable-wp;
|
|
cd-gpios = <&gpa2 4 GPIO_ACTIVE_HIGH>;
|
|
cd-inverted;
|
|
card-detect-delay = <200>;
|
|
samsung,dw-mshc-ciu-div = <3>;
|
|
samsung,dw-mshc-sdr-timing = <0 4>;
|
|
samsung,dw-mshc-ddr-timing = <0 2>;
|
|
fifo-depth = <0x80>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>;
|
|
bus-width = <4>;
|
|
};
|
|
|
|
&ppmu_d0_general {
|
|
status = "okay";
|
|
events {
|
|
ppmu_event0_d0_general: ppmu-event0-d0-general {
|
|
event-name = "ppmu-event0-d0-general";
|
|
};
|
|
};
|
|
};
|
|
|
|
&ppmu_d1_general {
|
|
status = "okay";
|
|
events {
|
|
ppmu_event0_d1_general: ppmu-event0-d1-general {
|
|
event-name = "ppmu-event0-d1-general";
|
|
};
|
|
};
|
|
};
|
|
|
|
&pinctrl_alive {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&initial_alive>;
|
|
|
|
initial_alive: initial-state {
|
|
PIN(INPUT, gpa0-0, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpa0-1, NONE, FAST_SR1);
|
|
PIN(INPUT, gpa0-2, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpa0-3, NONE, FAST_SR1);
|
|
PIN(INPUT, gpa0-4, NONE, FAST_SR1);
|
|
PIN(INPUT, gpa0-5, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpa0-6, NONE, FAST_SR1);
|
|
PIN(INPUT, gpa0-7, NONE, FAST_SR1);
|
|
|
|
PIN(INPUT, gpa1-0, UP, FAST_SR1);
|
|
PIN(INPUT, gpa1-1, UP, FAST_SR1);
|
|
PIN(INPUT, gpa1-2, NONE, FAST_SR1);
|
|
PIN(INPUT, gpa1-3, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpa1-4, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpa1-5, NONE, FAST_SR1);
|
|
PIN(INPUT, gpa1-6, NONE, FAST_SR1);
|
|
PIN(INPUT, gpa1-7, NONE, FAST_SR1);
|
|
|
|
PIN(INPUT, gpa2-0, NONE, FAST_SR1);
|
|
PIN(INPUT, gpa2-1, NONE, FAST_SR1);
|
|
PIN(INPUT, gpa2-2, NONE, FAST_SR1);
|
|
PIN(INPUT, gpa2-3, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpa2-4, NONE, FAST_SR1);
|
|
PIN(INPUT, gpa2-5, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpa2-6, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpa2-7, NONE, FAST_SR1);
|
|
|
|
PIN(INPUT, gpa3-0, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpa3-1, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpa3-2, NONE, FAST_SR1);
|
|
PIN(INPUT, gpa3-3, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpa3-4, NONE, FAST_SR1);
|
|
PIN(INPUT, gpa3-5, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpa3-6, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpa3-7, DOWN, FAST_SR1);
|
|
|
|
PIN(INPUT, gpf1-0, NONE, FAST_SR1);
|
|
PIN(INPUT, gpf1-1, NONE, FAST_SR1);
|
|
PIN(INPUT, gpf1-2, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpf1-4, UP, FAST_SR1);
|
|
PIN(OUTPUT, gpf1-5, NONE, FAST_SR1);
|
|
PIN(INPUT, gpf1-6, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpf1-7, DOWN, FAST_SR1);
|
|
|
|
PIN(INPUT, gpf2-0, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpf2-1, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpf2-2, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpf2-3, DOWN, FAST_SR1);
|
|
|
|
PIN(INPUT, gpf3-0, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpf3-1, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpf3-2, NONE, FAST_SR1);
|
|
PIN(INPUT, gpf3-3, DOWN, FAST_SR1);
|
|
|
|
PIN(INPUT, gpf4-0, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpf4-1, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpf4-2, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpf4-3, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpf4-4, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpf4-5, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpf4-6, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpf4-7, DOWN, FAST_SR1);
|
|
|
|
PIN(INPUT, gpf5-0, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpf5-1, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpf5-2, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpf5-3, DOWN, FAST_SR1);
|
|
PIN(OUTPUT, gpf5-4, NONE, FAST_SR1);
|
|
PIN(INPUT, gpf5-5, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpf5-6, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpf5-7, DOWN, FAST_SR1);
|
|
};
|
|
|
|
te_irq: te_irq {
|
|
samsung,pins = "gpf1-3";
|
|
samsung,pin-function = <0xf>;
|
|
};
|
|
};
|
|
|
|
&pinctrl_cpif {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&initial_cpif>;
|
|
|
|
initial_cpif: initial-state {
|
|
PIN(INPUT, gpv6-0, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpv6-1, DOWN, FAST_SR1);
|
|
};
|
|
};
|
|
|
|
&pinctrl_ese {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&initial_ese>;
|
|
|
|
initial_ese: initial-state {
|
|
PIN(INPUT, gpj2-0, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpj2-1, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpj2-2, DOWN, FAST_SR1);
|
|
};
|
|
};
|
|
|
|
&pinctrl_fsys {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&initial_fsys>;
|
|
|
|
initial_fsys: initial-state {
|
|
PIN(INPUT, gpr3-0, NONE, FAST_SR1);
|
|
PIN(INPUT, gpr3-1, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpr3-2, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpr3-3, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpr3-7, NONE, FAST_SR1);
|
|
};
|
|
};
|
|
|
|
&pinctrl_imem {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&initial_imem>;
|
|
|
|
initial_imem: initial-state {
|
|
PIN(INPUT, gpf0-0, UP, FAST_SR1);
|
|
PIN(INPUT, gpf0-1, UP, FAST_SR1);
|
|
PIN(INPUT, gpf0-2, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpf0-3, UP, FAST_SR1);
|
|
PIN(INPUT, gpf0-4, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpf0-5, NONE, FAST_SR1);
|
|
PIN(INPUT, gpf0-6, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpf0-7, UP, FAST_SR1);
|
|
};
|
|
};
|
|
|
|
&pinctrl_nfc {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&initial_nfc>;
|
|
|
|
initial_nfc: initial-state {
|
|
PIN(INPUT, gpj0-2, DOWN, FAST_SR1);
|
|
};
|
|
};
|
|
|
|
&pinctrl_peric {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&initial_peric>;
|
|
|
|
initial_peric: initial-state {
|
|
PIN(INPUT, gpv7-0, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpv7-1, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpv7-2, NONE, FAST_SR1);
|
|
PIN(INPUT, gpv7-3, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpv7-4, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpv7-5, DOWN, FAST_SR1);
|
|
|
|
PIN(INPUT, gpb0-4, DOWN, FAST_SR1);
|
|
|
|
PIN(INPUT, gpc0-2, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpc0-5, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpc0-7, DOWN, FAST_SR1);
|
|
|
|
PIN(INPUT, gpc1-1, DOWN, FAST_SR1);
|
|
|
|
PIN(INPUT, gpc3-4, NONE, FAST_SR1);
|
|
PIN(INPUT, gpc3-5, NONE, FAST_SR1);
|
|
PIN(INPUT, gpc3-6, NONE, FAST_SR1);
|
|
PIN(INPUT, gpc3-7, NONE, FAST_SR1);
|
|
|
|
PIN(OUTPUT, gpg0-0, NONE, FAST_SR1);
|
|
PIN(2, gpg0-1, DOWN, FAST_SR1);
|
|
|
|
PIN(INPUT, gpd2-5, DOWN, FAST_SR1);
|
|
|
|
PIN(INPUT, gpd4-0, NONE, FAST_SR1);
|
|
PIN(INPUT, gpd4-1, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpd4-2, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpd4-3, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpd4-4, DOWN, FAST_SR1);
|
|
|
|
PIN(INPUT, gpd6-3, DOWN, FAST_SR1);
|
|
|
|
PIN(INPUT, gpd8-1, UP, FAST_SR1);
|
|
|
|
PIN(INPUT, gpg1-0, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpg1-1, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpg1-2, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpg1-3, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpg1-4, DOWN, FAST_SR1);
|
|
|
|
PIN(INPUT, gpg2-0, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpg2-1, DOWN, FAST_SR1);
|
|
|
|
PIN(INPUT, gpg3-0, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpg3-1, DOWN, FAST_SR1);
|
|
PIN(INPUT, gpg3-5, DOWN, FAST_SR1);
|
|
};
|
|
};
|
|
|
|
&pinctrl_touch {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&initial_touch>;
|
|
|
|
initial_touch: initial-state {
|
|
PIN(INPUT, gpj1-2, DOWN, FAST_SR1);
|
|
};
|
|
};
|
|
|
|
&pwm {
|
|
pinctrl-0 = <&pwm0_out>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
};
|
|
|
|
&mic {
|
|
status = "okay";
|
|
};
|
|
|
|
&pmu_system_controller {
|
|
assigned-clocks = <&pmu_system_controller 0>;
|
|
assigned-clock-parents = <&xxti>;
|
|
};
|
|
|
|
&serial_1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&spi_1 {
|
|
cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
|
|
status = "okay";
|
|
|
|
wm5110: wm5110-codec@0 {
|
|
compatible = "wlf,wm5110";
|
|
reg = <0x0>;
|
|
spi-max-frequency = <20000000>;
|
|
interrupt-parent = <&gpa0>;
|
|
interrupts = <4 IRQ_TYPE_NONE>;
|
|
clocks = <&pmu_system_controller 0>,
|
|
<&s2mps13_osc S2MPS11_CLK_BT>;
|
|
clock-names = "mclk1", "mclk2";
|
|
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
|
|
wlf,micd-detect-debounce = <300>;
|
|
wlf,micd-bias-start-time = <0x1>;
|
|
wlf,micd-rate = <0x7>;
|
|
wlf,micd-dbtime = <0x1>;
|
|
wlf,micd-force-micbias;
|
|
wlf,micd-configs = <0x0 1 0>;
|
|
wlf,hpdet-channel = <1>;
|
|
wlf,gpsw = <0x1>;
|
|
wlf,inmode = <2 0 2 0>;
|
|
|
|
wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
|
|
wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
|
|
|
|
/* core supplies */
|
|
AVDD-supply = <&ldo18_reg>;
|
|
DBVDD1-supply = <&ldo18_reg>;
|
|
CPVDD-supply = <&ldo18_reg>;
|
|
DBVDD2-supply = <&ldo18_reg>;
|
|
DBVDD3-supply = <&ldo18_reg>;
|
|
|
|
controller-data {
|
|
samsung,spi-feedback-delay = <0>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&spi_3 {
|
|
status = "okay";
|
|
no-cs-readback;
|
|
|
|
irled@0 {
|
|
compatible = "ir-spi-led";
|
|
reg = <0x0>;
|
|
spi-max-frequency = <5000000>;
|
|
power-supply = <&irda_regulator>;
|
|
duty-cycle = <60>;
|
|
led-active-low;
|
|
|
|
controller-data {
|
|
samsung,spi-feedback-delay = <0>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&timer {
|
|
clock-frequency = <24000000>;
|
|
};
|
|
|
|
&tmu_atlas0 {
|
|
vtmu-supply = <&ldo3_reg>;
|
|
status = "okay";
|
|
};
|
|
|
|
&tmu_apollo {
|
|
vtmu-supply = <&ldo3_reg>;
|
|
status = "okay";
|
|
};
|
|
|
|
&tmu_g3d {
|
|
vtmu-supply = <&ldo3_reg>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdrd30 {
|
|
vdd33-supply = <&ldo10_reg>;
|
|
vdd10-supply = <&ldo6_reg>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdrd_dwc3 {
|
|
dr_mode = "otg";
|
|
extcon = <&muic>;
|
|
};
|
|
|
|
&usbdrd30_phy {
|
|
vbus-supply = <&safeout1_reg>;
|
|
status = "okay";
|
|
};
|
|
|
|
&xxti {
|
|
clock-frequency = <24000000>;
|
|
};
|