forked from Minki/linux
e02f866456
There are a number of statements of the form A, B or A, B, C where the numbers A,B,C are consecutive. Tidy these up to be A-B or A-C as appropriate and to comply better with copyright standards [1] [1] http://www.copyrightservice.co.uk/copyright/p03_copyright_notices section 4iii 'Year of publication' Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Simtec Linux Team <linux@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
96 lines
3.4 KiB
C
96 lines
3.4 KiB
C
/* arch/arm/mach-s3c2410/pll.c
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*
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* Copyright (c) 2006-2007 Simtec Electronics
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* http://armlinux.simtec.co.uk/
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* Ben Dooks <ben@simtec.co.uk>
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* Vincent Sanders <vince@arm.linux.org.uk>
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*
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* S3C2410 CPU PLL tables
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/sysdev.h>
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#include <linux/list.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <plat/cpu.h>
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#include <plat/cpu-freq-core.h>
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static struct cpufreq_frequency_table pll_vals_12MHz[] = {
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{ .frequency = 34000000, .index = PLLVAL(82, 2, 3), },
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{ .frequency = 45000000, .index = PLLVAL(82, 1, 3), },
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{ .frequency = 51000000, .index = PLLVAL(161, 3, 3), },
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{ .frequency = 48000000, .index = PLLVAL(120, 2, 3), },
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{ .frequency = 56000000, .index = PLLVAL(142, 2, 3), },
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{ .frequency = 68000000, .index = PLLVAL(82, 2, 2), },
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{ .frequency = 79000000, .index = PLLVAL(71, 1, 2), },
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{ .frequency = 85000000, .index = PLLVAL(105, 2, 2), },
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{ .frequency = 90000000, .index = PLLVAL(112, 2, 2), },
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{ .frequency = 101000000, .index = PLLVAL(127, 2, 2), },
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{ .frequency = 113000000, .index = PLLVAL(105, 1, 2), },
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{ .frequency = 118000000, .index = PLLVAL(150, 2, 2), },
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{ .frequency = 124000000, .index = PLLVAL(116, 1, 2), },
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{ .frequency = 135000000, .index = PLLVAL(82, 2, 1), },
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{ .frequency = 147000000, .index = PLLVAL(90, 2, 1), },
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{ .frequency = 152000000, .index = PLLVAL(68, 1, 1), },
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{ .frequency = 158000000, .index = PLLVAL(71, 1, 1), },
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{ .frequency = 170000000, .index = PLLVAL(77, 1, 1), },
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{ .frequency = 180000000, .index = PLLVAL(82, 1, 1), },
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{ .frequency = 186000000, .index = PLLVAL(85, 1, 1), },
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{ .frequency = 192000000, .index = PLLVAL(88, 1, 1), },
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{ .frequency = 203000000, .index = PLLVAL(161, 3, 1), },
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/* 2410A extras */
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{ .frequency = 210000000, .index = PLLVAL(132, 2, 1), },
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{ .frequency = 226000000, .index = PLLVAL(105, 1, 1), },
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{ .frequency = 266000000, .index = PLLVAL(125, 1, 1), },
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{ .frequency = 268000000, .index = PLLVAL(126, 1, 1), },
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{ .frequency = 270000000, .index = PLLVAL(127, 1, 1), },
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};
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static int s3c2410_plls_add(struct sys_device *dev)
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{
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return s3c_plltab_register(pll_vals_12MHz, ARRAY_SIZE(pll_vals_12MHz));
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}
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static struct sysdev_driver s3c2410_plls_drv = {
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.add = s3c2410_plls_add,
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};
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static int __init s3c2410_pll_init(void)
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{
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return sysdev_driver_register(&s3c2410_sysclass, &s3c2410_plls_drv);
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}
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arch_initcall(s3c2410_pll_init);
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static struct sysdev_driver s3c2410a_plls_drv = {
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.add = s3c2410_plls_add,
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};
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static int __init s3c2410a_pll_init(void)
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{
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return sysdev_driver_register(&s3c2410a_sysclass, &s3c2410a_plls_drv);
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}
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arch_initcall(s3c2410a_pll_init);
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