5933dd2f02
In old kernels, NET_SKB_PAD was defined to 16. Then commitd6301d3dd1(net: Increase default NET_SKB_PAD to 32), and commit18e8c134f4(net: Increase NET_SKB_PAD to 64 bytes) increased it to 64. While first patch was governed by network stack needs, second was more driven by performance issues on current hardware. Real intent was to align data on a cache line boundary. So use max(32, L1_CACHE_BYTES) instead of 64, to be more generic. Remove microblaze and powerpc own NET_SKB_PAD definitions. Thanks to Alexander Duyck and David Miller for their comments. Suggested-by: David Miller <davem@davemloft.net> Signed-off-by: Eric Dumazet <eric.dumazet@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
108 lines
2.5 KiB
C
108 lines
2.5 KiB
C
/*
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* Copyright (C) 2006 Atmark Techno, Inc.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#ifndef _ASM_MICROBLAZE_SYSTEM_H
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#define _ASM_MICROBLAZE_SYSTEM_H
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#include <asm/registers.h>
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#include <asm/setup.h>
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#include <asm/irqflags.h>
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#include <asm/cache.h>
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#include <asm-generic/cmpxchg.h>
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#include <asm-generic/cmpxchg-local.h>
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#define __ARCH_WANT_INTERRUPTS_ON_CTXSW
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struct task_struct;
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struct thread_info;
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extern struct task_struct *_switch_to(struct thread_info *prev,
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struct thread_info *next);
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#define switch_to(prev, next, last) \
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do { \
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(last) = _switch_to(task_thread_info(prev), \
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task_thread_info(next)); \
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} while (0)
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#define smp_read_barrier_depends() do {} while (0)
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#define read_barrier_depends() do {} while (0)
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#define nop() asm volatile ("nop")
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#define mb() barrier()
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#define rmb() mb()
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#define wmb() mb()
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#define set_mb(var, value) do { var = value; mb(); } while (0)
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#define set_wmb(var, value) do { var = value; wmb(); } while (0)
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#define smp_mb() mb()
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#define smp_rmb() rmb()
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#define smp_wmb() wmb()
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void show_trace(struct task_struct *task, unsigned long *stack);
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void __bad_xchg(volatile void *ptr, int size);
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static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
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int size)
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{
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unsigned long ret;
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unsigned long flags;
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switch (size) {
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case 1:
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local_irq_save(flags);
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ret = *(volatile unsigned char *)ptr;
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*(volatile unsigned char *)ptr = x;
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local_irq_restore(flags);
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break;
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case 4:
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local_irq_save(flags);
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ret = *(volatile unsigned long *)ptr;
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*(volatile unsigned long *)ptr = x;
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local_irq_restore(flags);
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break;
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default:
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__bad_xchg(ptr, size), ret = 0;
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break;
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}
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return ret;
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}
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void disable_hlt(void);
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void enable_hlt(void);
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void default_idle(void);
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#define xchg(ptr, x) \
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((__typeof__(*(ptr))) __xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
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void free_init_pages(char *what, unsigned long begin, unsigned long end);
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void free_initmem(void);
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extern char *klimit;
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extern void ret_from_fork(void);
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extern void *alloc_maybe_bootmem(size_t size, gfp_t mask);
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extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask);
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#ifdef CONFIG_DEBUG_FS
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extern struct dentry *of_debugfs_root;
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#endif
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#define arch_align_stack(x) (x)
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/*
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* MicroBlaze doesn't handle unaligned accesses in hardware.
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*
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* Based on this we force the IP header alignment in network drivers.
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*/
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#define NET_IP_ALIGN 2
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#endif /* _ASM_MICROBLAZE_SYSTEM_H */
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