forked from Minki/linux
0385d44640
Modern TTC implementations can extend the timer width to 32 bit. This feature is not self identifying so the driver needs to be made aware via device tree. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
22 lines
547 B
Plaintext
22 lines
547 B
Plaintext
Cadence TTC - Triple Timer Counter
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Required properties:
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- compatible : Should be "cdns,ttc".
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- reg : Specifies base physical address and size of the registers.
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- interrupts : A list of 3 interrupts; one per timer channel.
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- clocks: phandle to the source clock
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Optional properties:
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- timer-width: Bit width of the timer, necessary if not 16.
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Example:
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ttc0: ttc0@f8001000 {
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interrupt-parent = <&intc>;
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interrupts = < 0 10 4 0 11 4 0 12 4 >;
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compatible = "cdns,ttc";
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reg = <0xF8001000 0x1000>;
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clocks = <&cpu_clk 3>;
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timer-width = <32>;
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};
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