forked from Minki/linux
d240fe0a40
This describes how to specify multiple base addresses for sysirq in mediatek platforms. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Mars Cheng <mars.cheng@mediatek.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
37 lines
1.1 KiB
Plaintext
37 lines
1.1 KiB
Plaintext
+Mediatek 65xx/67xx/81xx sysirq
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Mediatek SOCs sysirq support controllable irq inverter for each GIC SPI
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interrupt.
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Required properties:
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- compatible: should be one of:
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"mediatek,mt8173-sysirq"
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"mediatek,mt8135-sysirq"
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"mediatek,mt8127-sysirq"
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"mediatek,mt6795-sysirq"
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"mediatek,mt6755-sysirq"
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"mediatek,mt6592-sysirq"
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"mediatek,mt6589-sysirq"
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"mediatek,mt6582-sysirq"
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"mediatek,mt6580-sysirq"
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"mediatek,mt6577-sysirq"
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"mediatek,mt2701-sysirq"
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- interrupt-controller : Identifies the node as an interrupt controller
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- #interrupt-cells : Use the same format as specified by GIC in arm,gic.txt.
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- interrupt-parent: phandle of irq parent for sysirq. The parent must
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use the same interrupt-cells format as GIC.
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- reg: Physical base address of the intpol registers and length of memory
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mapped region. Could be multiple bases here. Ex: mt6797 needs 2 reg, others
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need 1.
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Example:
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sysirq: intpol-controller@10200620 {
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compatible = "mediatek,mt6797-sysirq",
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"mediatek,mt6577-sysirq";
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interrupt-controller;
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#interrupt-cells = <3>;
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interrupt-parent = <&gic>;
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reg = <0 0x10220620 0 0x20>,
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<0 0x10220690 0 0x10>;
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};
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