Akira Tsukamoto 22b5f16ffe riscv: __asm_copy_to-from_user: Fix: fail on RV32 ... Had a bug when converting bytes to bits when the cpu was rv32. The a3 contains the number of bytes and multiple of 8 would be the bits. The LGREG is holding 2 for RV32 and 3 for RV32, so to achieve multiple of 8 it must always be constant 3. The 2 was mistakenly used for rv32. Signed-off-by: Akira Tsukamoto <akira.tsukamoto@gmail.com> Fixes: ca6eaaa210 ("riscv: __asm_copy_to-from_user: Optimize unaligned memory access and pipeline stall") Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>		2021-07-23 17:49:01 -07:00
..
boot	riscv: dts: fu740: fix cache-controller interrupts	2021-06-19 00:11:53 -07:00
configs	RISC-V: Enable Microchip PolarFire ICICLE SoC	2021-04-26 08:31:32 -07:00
errata	riscv: skip errata_cip_453.o if CONFIG_ERRATA_SIFIVE_CIP_453 is disabled	2021-06-01 21:16:41 -07:00
include	RISC-V: load initrd wherever it fits into memory	2021-07-21 22:58:17 -07:00
kernel	riscv: stacktrace: pin the task's stack in get_wchan	2021-07-23 17:29:03 -07:00
lib	riscv: __asm_copy_to-from_user: Fix: fail on RV32	2021-07-23 17:49:01 -07:00
mm	riscv: Make sure the kernel mapping does not overlap with IS_ERR_VALUE	2021-07-22 21:34:36 -07:00
net	riscv: bpf: Avoid breaking W^X	2021-04-26 08:25:14 -07:00
Kbuild	riscv: Allow device trees to be built into the kernel	2020-05-18 11:38:05 -07:00
Kconfig	RISC-V Patches for the 5.14 Merge Window, Part 1	2021-07-09 10:36:29 -07:00
Kconfig.debug	RISC-V: Remove EARLY_PRINTK support	2018-12-17 10:23:46 -08:00
Kconfig.erratas	riscv: enable SiFive errata CIP-453 and CIP-1200 Kconfig only if CONFIG_64BIT=y	2021-05-06 09:40:13 -07:00
Kconfig.socs	riscv: sifive: fix Kconfig errata warning	2021-06-12 17:20:50 -07:00
Makefile	Kbuild updates for v5.14	2021-07-10 11:01:38 -07:00