Dmitry Osipenko 221c057a84 soc/tegra: fuse: Cache values of straps and Chip ID registers ... There is no need to re-read Chip ID and HW straps out from hardware each time, it is a bit nicer to cache the values in memory. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>		2020-01-10 15:58:32 +01:00
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fuse	soc/tegra: fuse: Cache values of straps and Chip ID registers	2020-01-10 15:58:32 +01:00
common.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
flowctrl.c	ARM: tegra: Use WFE for power-gating on Tegra30	2019-10-29 14:32:01 +01:00
Kconfig	soc/tegra: fuse: Add APB DMA dependency for Tegra20	2020-01-10 15:30:11 +01:00
Makefile	soc/tegra: regulators: Add regulators coupler for Tegra30	2019-10-29 14:02:59 +01:00
pmc.c	soc/tegra: pmc: Add reset sources and levels on Tegra194	2019-11-18 13:56:58 +01:00
powergate-bpmp.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288	2019-06-05 17:36:37 +02:00
regulators-tegra20.c	soc/tegra: regulators: Do nothing if voltage is unchanged	2020-01-10 15:42:58 +01:00
regulators-tegra30.c	soc/tegra: regulators: Do nothing if voltage is unchanged	2020-01-10 15:42:58 +01:00