linux/arch/riscv/mm
Vineet Gupta 21ccdccd21
riscv: mm: don't advertise 1 num_asid for 0 asid bits
Even if mmu doesn't support ASID, current code calculates @num_asids=1
which is misleading, so avoid setting any asid related variables in such
case.

Also while here, print the number of asid bits discovered even for the
disabled case.

Verified this on Hifive Unmatched.

Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Vineet Gupta <vgupta@kernel.org>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2021-10-04 14:16:58 -07:00
..
cacheflush.c mm: reorder includes after introduction of linux/pgtable.h 2020-06-09 09:39:13 -07:00
context.c riscv: mm: don't advertise 1 num_asid for 0 asid bits 2021-10-04 14:16:58 -07:00
extable.c riscv: abstract out CSR names for supervisor vs machine mode 2019-11-05 09:20:42 -08:00
fault.c riscv: Enable KFENCE for riscv64 2021-06-30 20:55:41 -07:00
hugetlbpage.c hugetlbfs: remove hugetlb_add_hstate() warning for existing hstate 2020-06-03 20:09:46 -07:00
init.c RISC-V Patches for the 5.15 Merge Window, Part 1 2021-09-05 11:31:23 -07:00
kasan_init.c riscv: Ensure BPF_JIT_REGION_START aligned with PMD size 2021-06-18 21:10:05 -07:00
Makefile riscv: Fixup patch_text panic in ftrace 2021-01-14 15:09:04 -08:00
pageattr.c RISC-V Patches for the 5.11 Merge Window, Part 1 2020-12-18 10:43:07 -08:00
physaddr.c riscv: Introduce structure that group all variables regarding kernel mapping 2021-07-05 18:04:00 -07:00
ptdump.c riscv: Fix PTDUMP output now BPF region moved back to module region 2021-07-06 15:21:27 -07:00
tlbflush.c riscv: add ASID-based tlbflushing methods 2021-06-30 20:55:39 -07:00