Miquel Raynal 2182066d95 clk: renesas: r9a06g032: Probe possible children ... The clock controller device on r9a06g032 takes all the memory range that is described as being a system controller. This range contains many different (unrelated?) registers besides the ones belonging to the clock controller, that can necessitate to be accessed from other peripherals. For instance, the dmamux registers are there. The dmamux "device" will be described as a child node of the clock/system controller node, which means we need the top device driver (the clock controller driver in this case) to populate its children manually. In case of error when populating the children, we do not fail the probe on purpose to keep the clk driver up and running. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20220427095653.91804-7-miquel.raynal@bootlin.com Signed-off-by: Vinod Koul <vkoul@kernel.org>		2022-05-19 22:34:51 +05:30
..
clk-div6.c	clk: renesas: div6: Implement range checking	2021-05-11 09:58:13 +02:00
clk-div6.h	We have two changes to the core framework this time around. The first being a	2017-11-17 20:04:24 -08:00
clk-emev2.c	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	2018-10-18 15:33:52 -07:00
clk-mstp.c	clk: renesas: Zero init clk_init_data	2021-03-30 09:58:27 +02:00
clk-r8a73a4.c	clk: Remove io.h from clk-provider.h	2019-05-15 13:21:37 -07:00
clk-r8a7740.c	clk: Remove io.h from clk-provider.h	2019-05-15 13:21:37 -07:00
clk-r8a7778.c	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	2018-10-18 15:33:52 -07:00
clk-r8a7779.c	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	2018-10-18 15:33:52 -07:00
clk-rz.c	remove ioremap_nocache and devm_ioremap_nocache	2020-01-06 09:45:59 +01:00
clk-sh73a0.c	clk: renesas: sh73a0: Stop using __raw_*() I/O accessors	2020-12-10 08:34:01 +01:00
Kconfig	clk: renesas: rzg2l-cpg: Add support for RZ/V2L SoC	2022-02-10 14:34:58 +01:00
Makefile	clk: renesas: rzg2l-cpg: Add support for RZ/V2L SoC	2022-02-10 14:34:58 +01:00
r7s9210-cpg-mssr.c	clk: renesas: cpg-mssr: Use enum clk_reg_layout instead of a boolean flag	2020-09-17 15:30:08 +02:00
r8a774a1-cpg-mssr.c	clk: renesas: rcar-gen3: Add SDnH clock	2021-11-19 11:27:58 +01:00
r8a774b1-cpg-mssr.c	clk: renesas: rcar-gen3: Add SDnH clock	2021-11-19 11:27:58 +01:00
r8a774c0-cpg-mssr.c	clk: renesas: rcar-gen3: Add SDnH clock	2021-11-19 11:27:58 +01:00
r8a774e1-cpg-mssr.c	clk: renesas: rcar-gen3: Add SDnH clock	2021-11-19 11:27:58 +01:00
r8a779a0-cpg-mssr.c	clk: renesas: r8a779a0: Add CANFD module clock	2022-01-24 09:57:25 +01:00
r8a779f0-cpg-mssr.c	clk: renesas: r8a779f0: Add PFC clock	2022-02-22 09:51:20 +01:00
r8a7742-cpg-mssr.c	clk: renesas: r8a7742: Add clk entry for VSPR	2020-09-04 09:42:01 +02:00
r8a7743-cpg-mssr.c	clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)	2020-09-04 09:42:01 +02:00
r8a7745-cpg-mssr.c	clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)	2020-09-04 09:42:01 +02:00
r8a7790-cpg-mssr.c	clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)	2020-09-04 09:42:01 +02:00
r8a7791-cpg-mssr.c	clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)	2020-09-04 09:42:01 +02:00
r8a7792-cpg-mssr.c	clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)	2020-09-04 09:42:01 +02:00
r8a7794-cpg-mssr.c	clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)	2020-09-04 09:42:01 +02:00
r8a7795-cpg-mssr.c	clk: renesas: rcar-gen3: Add SDnH clock	2021-11-19 11:27:58 +01:00
r8a7796-cpg-mssr.c	clk: renesas: rcar-gen3: Add SDnH clock	2021-11-19 11:27:58 +01:00
r8a77470-cpg-mssr.c	clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)	2020-09-04 09:42:01 +02:00
r8a77965-cpg-mssr.c	clk: renesas: rcar-gen3: Add SDnH clock	2021-11-19 11:27:58 +01:00
r8a77970-cpg-mssr.c	clk: renesas: rcar-gen3: Mark RWDT clocks as critical	2020-06-22 16:53:49 +02:00
r8a77980-cpg-mssr.c	clk: renesas: rcar-gen3: Add SDnH clock	2021-11-19 11:27:58 +01:00
r8a77990-cpg-mssr.c	clk: renesas: r8a7799[05]: Add MLP clocks	2022-01-24 09:55:14 +01:00
r8a77995-cpg-mssr.c	clk: renesas: r8a7799[05]: Add MLP clocks	2022-01-24 09:55:14 +01:00
r9a06g032-clocks.c	clk: renesas: r9a06g032: Probe possible children	2022-05-19 22:34:51 +05:30
r9a07g044-cpg.c	clk: renesas: rzg2l-cpg: Add support for RZ/V2L SoC	2022-02-10 14:34:58 +01:00
rcar-cpg-lib.c	clk: renesas: rcar-gen3: Switch to new SD clock handling	2021-11-19 11:32:39 +01:00
rcar-cpg-lib.h	clk: renesas: rcar-gen3: Switch to new SD clock handling	2021-11-19 11:32:39 +01:00
rcar-gen2-cpg.c	clk: renesas: Zero init clk_init_data	2021-03-30 09:58:27 +02:00
rcar-gen2-cpg.h	clk: renesas: rcar-gen2: Change multipliers and dividers to u8	2019-12-10 10:24:10 +01:00
rcar-gen3-cpg.c	clk: renesas: rcar-gen3: Remove outdated SD_SKIP_FIRST	2021-11-19 11:32:39 +01:00
rcar-gen3-cpg.h	clk: renesas: rcar-gen3: Add dummy SDnH clock	2021-11-19 11:27:58 +01:00
rcar-gen4-cpg.c	clk: renesas: rcar-gen4: Introduce R-Car Gen4 CPG driver	2021-12-08 10:05:22 +01:00
rcar-gen4-cpg.h	clk: renesas: rcar-gen4: Introduce R-Car Gen4 CPG driver	2021-12-08 10:05:22 +01:00
rcar-usb2-clock-sel.c	clk: renesas: rcar-usb2-clock-sel: Fix kernel NULL pointer dereference	2021-08-28 21:29:36 -07:00
renesas-cpg-mssr.c	clk: renesas: cpg-mssr: Add support for R-Car S4-8	2021-12-08 10:05:56 +01:00
renesas-cpg-mssr.h	clk: renesas: cpg-mssr: Add support for R-Car S4-8	2021-12-08 10:05:56 +01:00
rzg2l-cpg.c	clk: renesas: rzg2l-cpg: Add support for RZ/V2L SoC	2022-02-10 14:34:58 +01:00
rzg2l-cpg.h	clk: renesas: rzg2l-cpg: Add support for RZ/V2L SoC	2022-02-10 14:34:58 +01:00