linux/arch/x86/events/intel
Kan Liang 2145e77fec perf/x86/intel: Enable PEBS format 5
The new PEBS Record Format 5 is similar to the PEBS Record Format 4. The
only difference is the layout of the Counter Reset fields of the PEBS
Config Buffer in the DS area. For the PEBS format 4, the Counter Reset
fields allocation is for 8 general-purpose counters followed by 4
fixed-function counters. For the PEBS format 5, the Counter Reset fields
allocation is for 32 general-purpose counters followed by 16
fixed-function counters.

Extend the MAX_PEBS_EVENTS to 32. Add MAX_PEBS_EVENTS_FMT4 for the
previous platform. Except for the DS auto-reload code, other places
already assume 32 counters. Only check the PEBS_FMT in the DS
auto-reload code.

Extend the MAX_FIXED_PEBS_EVENTS to 16, which only impacts the size of
struct debug_store and some local temporary variables. The size of
struct debug_store increases 288B, which is small and should be
acceptable.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/1643750603-100733-1-git-send-email-kan.liang@linux.intel.com
2022-02-02 13:11:43 +01:00
..
bts.c perf/x86: Add compiler barrier after updating BTS 2021-09-17 15:08:38 +02:00
core.c perf/x86/intel/lbr: Support LBR format V7 2022-01-18 12:09:48 +01:00
cstate.c perf/x86/cstate: Add ICELAKE_X and ICELAKE_D support 2021-07-02 15:58:33 +02:00
ds.c perf/x86/intel: Enable PEBS format 5 2022-02-02 13:11:43 +01:00
knc.c License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
lbr.c x86/perf: Avoid warning for Arch LBR without XSAVE 2022-01-18 12:09:49 +01:00
Makefile perf/x86/intel/uncore: Parse uncore discovery tables 2021-04-02 10:04:54 +02:00
p4.c Perf events changes in this cycle were: 2021-04-28 13:03:44 -07:00
p6.c x86/cpu: Rename cpu_data.x86_mask to cpu_data.x86_stepping 2018-02-15 01:15:52 +01:00
pt.c perf/x86/intel/pt: Fix address filter config for 32-bit kernel 2022-02-02 13:11:43 +01:00
pt.h perf/x86/intel/pt: Prevent redundant WRMSRs 2019-11-13 11:06:18 +01:00
uncore_discovery.c perf/x86/intel/uncore: Add IMC uncore support for ADL 2022-01-18 12:09:49 +01:00
uncore_discovery.h perf/x86/intel/uncore: Add IMC uncore support for ADL 2022-01-18 12:09:49 +01:00
uncore_nhmex.c perf/x86/intel/uncore: Correct fixed counter index check for NHM 2018-05-31 12:36:28 +02:00
uncore_snb.c perf/x86/intel/uncore: Add IMC uncore support for ADL 2022-01-18 12:09:49 +01:00
uncore_snbep.c perf/x86/intel/uncore: Fix CAS_COUNT_WRITE issue for ICX 2022-01-18 12:09:48 +01:00
uncore.c perf/x86/intel/uncore: Add IMC uncore support for ADL 2022-01-18 12:09:49 +01:00
uncore.h perf/x86/intel/uncore: Add IMC uncore support for ADL 2022-01-18 12:09:49 +01:00