forked from Minki/linux
1f27f15258
Add code for device tree support of clocks in the BCM281xx family of
SoCs. Machines in this family use peripheral clocks implemented by
"Kona" clock control units (CCUs). (Other Broadcom SoC families use
Kona style CCUs as well, but support for them is not yet upstream.)
A BCM281xx SoC has multiple CCUs, each of which manages a set of
clocks on the SoC. A Kona peripheral clock is composite clock that
may include a gate, a parent clock multiplexor, and zero, one
or two dividers. There is a variety of gate types, and many gates
implement hardware-managed gating (often called "auto-gating").
Most dividers divide their input clock signal by an integer value
(one or more). There are also "fractional" dividers which allow
division by non-integer values. To accomodate such dividers,
clock rates and dividers are generally maintained by the code in
"scaled" form, which allows integer and fractional dividers to
be handled in a uniform way.
If present, the gate for a Kona peripheral clock must be enabled
when a change is made to its multiplexor or one of its dividers.
Additionally, dividers and multiplexors have trigger registers which
must be used whenever the divider value or selected parent clock is
changed. The same trigger is often used for a divider and
multiplexor, and a BCM281xx peripheral clock occasionally has two
triggers.
The gate, dividers, and parent clock selector are treated in this
code as "components" of a peripheral clock. Their functionality is
implemented directly--e.g. the common clock framework gate
implementation is not used for a Kona peripheral clock gate. (This
has being considered though, and the intention is to evolve this
code to leverage common code as much as possible.)
The source code is divided into three general portions:
drivers/clk/bcm/clk-kona.h
drivers/clk/bcm/clk-kona.c
These implement the basic Kona clock functionality,
including the clk_ops methods and various routines to
manipulate registers and interpret their values. This
includes some functions used to set clocks to a desired
initial state (though this feature is only partially
implemented here).
drivers/clk/bcm/clk-kona-setup.c
This contains generic run-time initialization code for
data structures representing Kona CCUs and clocks. This
encapsulates the clock structure initialization that can't
be done statically. Note that there is a great deal of
validity-checking code here, making explicit certain
assumptions in the code. This is mostly useful for adding
new clock definitions and could possibly be disabled for
production use.
drivers/clk/bcm/clk-bcm281xx.c
This file defines the specific CCUs used by BCM281XX family
SoCs, as well as the specific clocks implemented by each.
It declares a device tree clock match entry for each CCU
defined.
include/dt-bindings/clock/bcm281xx.h
This file defines the selector (index) values used to
identify a particular clock provided by a CCU. It consists
entirely of C preprocessor constants, to be used by both the
C source and device tree source files.
Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Matt Porter <mporter@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
66 lines
1.9 KiB
C
66 lines
1.9 KiB
C
/*
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* Copyright (C) 2013 Broadcom Corporation
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* Copyright 2013 Linaro Limited
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _CLOCK_BCM281XX_H
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#define _CLOCK_BCM281XX_H
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/*
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* This file defines the values used to specify clocks provided by
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* the clock control units (CCUs) on Broadcom BCM281XX family SoCs.
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*/
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/* root CCU clock ids */
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#define BCM281XX_ROOT_CCU_FRAC_1M 0
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#define BCM281XX_ROOT_CCU_CLOCK_COUNT 1
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/* aon CCU clock ids */
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#define BCM281XX_AON_CCU_HUB_TIMER 0
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#define BCM281XX_AON_CCU_PMU_BSC 1
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#define BCM281XX_AON_CCU_PMU_BSC_VAR 2
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#define BCM281XX_AON_CCU_CLOCK_COUNT 3
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/* hub CCU clock ids */
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#define BCM281XX_HUB_CCU_TMON_1M 0
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#define BCM281XX_HUB_CCU_CLOCK_COUNT 1
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/* master CCU clock ids */
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#define BCM281XX_MASTER_CCU_SDIO1 0
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#define BCM281XX_MASTER_CCU_SDIO2 1
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#define BCM281XX_MASTER_CCU_SDIO3 2
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#define BCM281XX_MASTER_CCU_SDIO4 3
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#define BCM281XX_MASTER_CCU_USB_IC 4
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#define BCM281XX_MASTER_CCU_HSIC2_48M 5
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#define BCM281XX_MASTER_CCU_HSIC2_12M 6
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#define BCM281XX_MASTER_CCU_CLOCK_COUNT 7
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/* slave CCU clock ids */
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#define BCM281XX_SLAVE_CCU_UARTB 0
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#define BCM281XX_SLAVE_CCU_UARTB2 1
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#define BCM281XX_SLAVE_CCU_UARTB3 2
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#define BCM281XX_SLAVE_CCU_UARTB4 3
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#define BCM281XX_SLAVE_CCU_SSP0 4
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#define BCM281XX_SLAVE_CCU_SSP2 5
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#define BCM281XX_SLAVE_CCU_BSC1 6
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#define BCM281XX_SLAVE_CCU_BSC2 7
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#define BCM281XX_SLAVE_CCU_BSC3 8
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#define BCM281XX_SLAVE_CCU_PWM 9
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#define BCM281XX_SLAVE_CCU_CLOCK_COUNT 10
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#endif /* _CLOCK_BCM281XX_H */
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