forked from Minki/linux
c56ac7a0f4
Enable wakeup in the hym8563 driver if the IRQ was successfully
requested or if wakeup-source is set in the devicetree.
As per the description of device_init_wakeup(), it should be enabled
for "devices that everyone expects to be wakeup sources". One would
expect this to be the case with a real-time clock.
Tested on rk3288-rock2-square, which has an IRQ configured for the
RTC. As a result, wakeup was enabled during driver initialisation.
Fixes: dcaf038493
("rtc: add hym8563 rtc-driver")
Reported-by: kernelci.org bot <bot@kernelci.org>
Signed-off-by: Guillaume Tucker <guillaume.tucker@collabora.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/1ea023e2ba50a4dab6e39be93d7de3146af71a60.1604653374.git.guillaume.tucker@collabora.com
603 lines
14 KiB
C
603 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Haoyu HYM8563 RTC driver
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*
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* Copyright (C) 2013 MundoReader S.L.
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* Author: Heiko Stuebner <heiko@sntech.de>
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*
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* based on rtc-HYM8563
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* Copyright (C) 2010 ROCKCHIP, Inc.
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*/
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#include <linux/module.h>
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#include <linux/clk-provider.h>
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#include <linux/i2c.h>
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#include <linux/bcd.h>
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#include <linux/rtc.h>
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#define HYM8563_CTL1 0x00
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#define HYM8563_CTL1_TEST BIT(7)
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#define HYM8563_CTL1_STOP BIT(5)
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#define HYM8563_CTL1_TESTC BIT(3)
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#define HYM8563_CTL2 0x01
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#define HYM8563_CTL2_TI_TP BIT(4)
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#define HYM8563_CTL2_AF BIT(3)
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#define HYM8563_CTL2_TF BIT(2)
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#define HYM8563_CTL2_AIE BIT(1)
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#define HYM8563_CTL2_TIE BIT(0)
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#define HYM8563_SEC 0x02
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#define HYM8563_SEC_VL BIT(7)
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#define HYM8563_SEC_MASK 0x7f
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#define HYM8563_MIN 0x03
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#define HYM8563_MIN_MASK 0x7f
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#define HYM8563_HOUR 0x04
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#define HYM8563_HOUR_MASK 0x3f
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#define HYM8563_DAY 0x05
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#define HYM8563_DAY_MASK 0x3f
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#define HYM8563_WEEKDAY 0x06
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#define HYM8563_WEEKDAY_MASK 0x07
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#define HYM8563_MONTH 0x07
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#define HYM8563_MONTH_CENTURY BIT(7)
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#define HYM8563_MONTH_MASK 0x1f
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#define HYM8563_YEAR 0x08
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#define HYM8563_ALM_MIN 0x09
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#define HYM8563_ALM_HOUR 0x0a
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#define HYM8563_ALM_DAY 0x0b
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#define HYM8563_ALM_WEEK 0x0c
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/* Each alarm check can be disabled by setting this bit in the register */
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#define HYM8563_ALM_BIT_DISABLE BIT(7)
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#define HYM8563_CLKOUT 0x0d
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#define HYM8563_CLKOUT_ENABLE BIT(7)
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#define HYM8563_CLKOUT_32768 0
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#define HYM8563_CLKOUT_1024 1
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#define HYM8563_CLKOUT_32 2
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#define HYM8563_CLKOUT_1 3
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#define HYM8563_CLKOUT_MASK 3
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#define HYM8563_TMR_CTL 0x0e
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#define HYM8563_TMR_CTL_ENABLE BIT(7)
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#define HYM8563_TMR_CTL_4096 0
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#define HYM8563_TMR_CTL_64 1
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#define HYM8563_TMR_CTL_1 2
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#define HYM8563_TMR_CTL_1_60 3
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#define HYM8563_TMR_CTL_MASK 3
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#define HYM8563_TMR_CNT 0x0f
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struct hym8563 {
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struct i2c_client *client;
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struct rtc_device *rtc;
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#ifdef CONFIG_COMMON_CLK
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struct clk_hw clkout_hw;
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#endif
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};
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/*
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* RTC handling
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*/
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static int hym8563_rtc_read_time(struct device *dev, struct rtc_time *tm)
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{
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struct i2c_client *client = to_i2c_client(dev);
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u8 buf[7];
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int ret;
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ret = i2c_smbus_read_i2c_block_data(client, HYM8563_SEC, 7, buf);
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if (ret < 0)
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return ret;
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if (buf[0] & HYM8563_SEC_VL) {
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dev_warn(&client->dev,
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"no valid clock/calendar values available\n");
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return -EINVAL;
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}
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tm->tm_sec = bcd2bin(buf[0] & HYM8563_SEC_MASK);
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tm->tm_min = bcd2bin(buf[1] & HYM8563_MIN_MASK);
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tm->tm_hour = bcd2bin(buf[2] & HYM8563_HOUR_MASK);
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tm->tm_mday = bcd2bin(buf[3] & HYM8563_DAY_MASK);
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tm->tm_wday = bcd2bin(buf[4] & HYM8563_WEEKDAY_MASK); /* 0 = Sun */
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tm->tm_mon = bcd2bin(buf[5] & HYM8563_MONTH_MASK) - 1; /* 0 = Jan */
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tm->tm_year = bcd2bin(buf[6]) + 100;
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return 0;
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}
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static int hym8563_rtc_set_time(struct device *dev, struct rtc_time *tm)
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{
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struct i2c_client *client = to_i2c_client(dev);
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u8 buf[7];
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int ret;
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/* Years >= 2100 are to far in the future, 19XX is to early */
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if (tm->tm_year < 100 || tm->tm_year >= 200)
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return -EINVAL;
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buf[0] = bin2bcd(tm->tm_sec);
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buf[1] = bin2bcd(tm->tm_min);
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buf[2] = bin2bcd(tm->tm_hour);
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buf[3] = bin2bcd(tm->tm_mday);
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buf[4] = bin2bcd(tm->tm_wday);
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buf[5] = bin2bcd(tm->tm_mon + 1);
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/*
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* While the HYM8563 has a century flag in the month register,
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* it does not seem to carry it over a subsequent write/read.
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* So we'll limit ourself to 100 years, starting at 2000 for now.
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*/
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buf[6] = bin2bcd(tm->tm_year - 100);
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/*
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* CTL1 only contains TEST-mode bits apart from stop,
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* so no need to read the value first
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*/
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ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1,
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HYM8563_CTL1_STOP);
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if (ret < 0)
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return ret;
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ret = i2c_smbus_write_i2c_block_data(client, HYM8563_SEC, 7, buf);
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if (ret < 0)
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return ret;
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ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
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if (ret < 0)
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return ret;
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return 0;
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}
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static int hym8563_rtc_alarm_irq_enable(struct device *dev,
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unsigned int enabled)
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{
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struct i2c_client *client = to_i2c_client(dev);
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int data;
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data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
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if (data < 0)
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return data;
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if (enabled)
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data |= HYM8563_CTL2_AIE;
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else
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data &= ~HYM8563_CTL2_AIE;
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return i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
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};
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static int hym8563_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
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{
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struct i2c_client *client = to_i2c_client(dev);
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struct rtc_time *alm_tm = &alm->time;
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u8 buf[4];
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int ret;
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ret = i2c_smbus_read_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
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if (ret < 0)
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return ret;
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/* The alarm only has a minute accuracy */
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alm_tm->tm_sec = 0;
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alm_tm->tm_min = (buf[0] & HYM8563_ALM_BIT_DISABLE) ?
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-1 :
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bcd2bin(buf[0] & HYM8563_MIN_MASK);
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alm_tm->tm_hour = (buf[1] & HYM8563_ALM_BIT_DISABLE) ?
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-1 :
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bcd2bin(buf[1] & HYM8563_HOUR_MASK);
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alm_tm->tm_mday = (buf[2] & HYM8563_ALM_BIT_DISABLE) ?
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-1 :
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bcd2bin(buf[2] & HYM8563_DAY_MASK);
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alm_tm->tm_wday = (buf[3] & HYM8563_ALM_BIT_DISABLE) ?
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-1 :
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bcd2bin(buf[3] & HYM8563_WEEKDAY_MASK);
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ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
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if (ret < 0)
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return ret;
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if (ret & HYM8563_CTL2_AIE)
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alm->enabled = 1;
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return 0;
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}
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static int hym8563_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
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{
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struct i2c_client *client = to_i2c_client(dev);
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struct rtc_time *alm_tm = &alm->time;
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u8 buf[4];
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int ret;
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/*
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* The alarm has no seconds so deal with it
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*/
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if (alm_tm->tm_sec) {
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alm_tm->tm_sec = 0;
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alm_tm->tm_min++;
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if (alm_tm->tm_min >= 60) {
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alm_tm->tm_min = 0;
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alm_tm->tm_hour++;
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if (alm_tm->tm_hour >= 24) {
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alm_tm->tm_hour = 0;
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alm_tm->tm_mday++;
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if (alm_tm->tm_mday > 31)
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alm_tm->tm_mday = 0;
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}
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}
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}
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ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
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if (ret < 0)
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return ret;
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ret &= ~HYM8563_CTL2_AIE;
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ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
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if (ret < 0)
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return ret;
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buf[0] = (alm_tm->tm_min < 60 && alm_tm->tm_min >= 0) ?
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bin2bcd(alm_tm->tm_min) : HYM8563_ALM_BIT_DISABLE;
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buf[1] = (alm_tm->tm_hour < 24 && alm_tm->tm_hour >= 0) ?
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bin2bcd(alm_tm->tm_hour) : HYM8563_ALM_BIT_DISABLE;
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buf[2] = (alm_tm->tm_mday <= 31 && alm_tm->tm_mday >= 1) ?
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bin2bcd(alm_tm->tm_mday) : HYM8563_ALM_BIT_DISABLE;
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buf[3] = (alm_tm->tm_wday < 7 && alm_tm->tm_wday >= 0) ?
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bin2bcd(alm_tm->tm_wday) : HYM8563_ALM_BIT_DISABLE;
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ret = i2c_smbus_write_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
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if (ret < 0)
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return ret;
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return hym8563_rtc_alarm_irq_enable(dev, alm->enabled);
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}
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static const struct rtc_class_ops hym8563_rtc_ops = {
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.read_time = hym8563_rtc_read_time,
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.set_time = hym8563_rtc_set_time,
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.alarm_irq_enable = hym8563_rtc_alarm_irq_enable,
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.read_alarm = hym8563_rtc_read_alarm,
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.set_alarm = hym8563_rtc_set_alarm,
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};
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/*
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* Handling of the clkout
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*/
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#ifdef CONFIG_COMMON_CLK
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#define clkout_hw_to_hym8563(_hw) container_of(_hw, struct hym8563, clkout_hw)
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static int clkout_rates[] = {
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32768,
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1024,
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32,
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1,
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};
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static unsigned long hym8563_clkout_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
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struct i2c_client *client = hym8563->client;
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int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
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if (ret < 0)
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return 0;
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ret &= HYM8563_CLKOUT_MASK;
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return clkout_rates[ret];
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}
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static long hym8563_clkout_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *prate)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
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if (clkout_rates[i] <= rate)
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return clkout_rates[i];
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return 0;
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}
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static int hym8563_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
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struct i2c_client *client = hym8563->client;
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int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
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int i;
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if (ret < 0)
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return ret;
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for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
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if (clkout_rates[i] == rate) {
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ret &= ~HYM8563_CLKOUT_MASK;
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ret |= i;
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return i2c_smbus_write_byte_data(client,
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HYM8563_CLKOUT, ret);
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}
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return -EINVAL;
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}
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static int hym8563_clkout_control(struct clk_hw *hw, bool enable)
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{
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struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
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struct i2c_client *client = hym8563->client;
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int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
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if (ret < 0)
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return ret;
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if (enable)
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ret |= HYM8563_CLKOUT_ENABLE;
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else
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ret &= ~HYM8563_CLKOUT_ENABLE;
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return i2c_smbus_write_byte_data(client, HYM8563_CLKOUT, ret);
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}
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static int hym8563_clkout_prepare(struct clk_hw *hw)
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{
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return hym8563_clkout_control(hw, 1);
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}
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static void hym8563_clkout_unprepare(struct clk_hw *hw)
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{
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hym8563_clkout_control(hw, 0);
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}
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static int hym8563_clkout_is_prepared(struct clk_hw *hw)
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{
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struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
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struct i2c_client *client = hym8563->client;
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int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
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if (ret < 0)
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return ret;
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return !!(ret & HYM8563_CLKOUT_ENABLE);
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}
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static const struct clk_ops hym8563_clkout_ops = {
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.prepare = hym8563_clkout_prepare,
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.unprepare = hym8563_clkout_unprepare,
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.is_prepared = hym8563_clkout_is_prepared,
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.recalc_rate = hym8563_clkout_recalc_rate,
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.round_rate = hym8563_clkout_round_rate,
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.set_rate = hym8563_clkout_set_rate,
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};
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static struct clk *hym8563_clkout_register_clk(struct hym8563 *hym8563)
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{
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struct i2c_client *client = hym8563->client;
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struct device_node *node = client->dev.of_node;
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struct clk *clk;
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struct clk_init_data init;
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int ret;
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ret = i2c_smbus_write_byte_data(client, HYM8563_CLKOUT,
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0);
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if (ret < 0)
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return ERR_PTR(ret);
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init.name = "hym8563-clkout";
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init.ops = &hym8563_clkout_ops;
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init.flags = 0;
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init.parent_names = NULL;
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init.num_parents = 0;
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hym8563->clkout_hw.init = &init;
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/* optional override of the clockname */
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of_property_read_string(node, "clock-output-names", &init.name);
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/* register the clock */
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clk = clk_register(&client->dev, &hym8563->clkout_hw);
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if (!IS_ERR(clk))
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of_clk_add_provider(node, of_clk_src_simple_get, clk);
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return clk;
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}
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#endif
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/*
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* The alarm interrupt is implemented as a level-low interrupt in the
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* hym8563, while the timer interrupt uses a falling edge.
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* We don't use the timer at all, so the interrupt is requested to
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* use the level-low trigger.
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*/
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static irqreturn_t hym8563_irq(int irq, void *dev_id)
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{
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struct hym8563 *hym8563 = (struct hym8563 *)dev_id;
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struct i2c_client *client = hym8563->client;
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struct mutex *lock = &hym8563->rtc->ops_lock;
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int data, ret;
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mutex_lock(lock);
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/* Clear the alarm flag */
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data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
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if (data < 0) {
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dev_err(&client->dev, "%s: error reading i2c data %d\n",
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__func__, data);
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goto out;
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}
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data &= ~HYM8563_CTL2_AF;
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ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
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if (ret < 0) {
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dev_err(&client->dev, "%s: error writing i2c data %d\n",
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__func__, ret);
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}
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out:
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mutex_unlock(lock);
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return IRQ_HANDLED;
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}
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static int hym8563_init_device(struct i2c_client *client)
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{
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int ret;
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/* Clear stop flag if present */
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ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
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|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
/* Disable alarm and timer interrupts */
|
|
ret &= ~HYM8563_CTL2_AIE;
|
|
ret &= ~HYM8563_CTL2_TIE;
|
|
|
|
/* Clear any pending alarm and timer flags */
|
|
if (ret & HYM8563_CTL2_AF)
|
|
ret &= ~HYM8563_CTL2_AF;
|
|
|
|
if (ret & HYM8563_CTL2_TF)
|
|
ret &= ~HYM8563_CTL2_TF;
|
|
|
|
ret &= ~HYM8563_CTL2_TI_TP;
|
|
|
|
return i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
|
|
}
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static int hym8563_suspend(struct device *dev)
|
|
{
|
|
struct i2c_client *client = to_i2c_client(dev);
|
|
int ret;
|
|
|
|
if (device_may_wakeup(dev)) {
|
|
ret = enable_irq_wake(client->irq);
|
|
if (ret) {
|
|
dev_err(dev, "enable_irq_wake failed, %d\n", ret);
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int hym8563_resume(struct device *dev)
|
|
{
|
|
struct i2c_client *client = to_i2c_client(dev);
|
|
|
|
if (device_may_wakeup(dev))
|
|
disable_irq_wake(client->irq);
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static SIMPLE_DEV_PM_OPS(hym8563_pm_ops, hym8563_suspend, hym8563_resume);
|
|
|
|
static int hym8563_probe(struct i2c_client *client,
|
|
const struct i2c_device_id *id)
|
|
{
|
|
struct hym8563 *hym8563;
|
|
int ret;
|
|
|
|
hym8563 = devm_kzalloc(&client->dev, sizeof(*hym8563), GFP_KERNEL);
|
|
if (!hym8563)
|
|
return -ENOMEM;
|
|
|
|
hym8563->client = client;
|
|
i2c_set_clientdata(client, hym8563);
|
|
|
|
ret = hym8563_init_device(client);
|
|
if (ret) {
|
|
dev_err(&client->dev, "could not init device, %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
if (client->irq > 0) {
|
|
ret = devm_request_threaded_irq(&client->dev, client->irq,
|
|
NULL, hym8563_irq,
|
|
IRQF_TRIGGER_LOW | IRQF_ONESHOT,
|
|
client->name, hym8563);
|
|
if (ret < 0) {
|
|
dev_err(&client->dev, "irq %d request failed, %d\n",
|
|
client->irq, ret);
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
if (client->irq > 0 ||
|
|
device_property_read_bool(&client->dev, "wakeup-source")) {
|
|
device_init_wakeup(&client->dev, true);
|
|
}
|
|
|
|
/* check state of calendar information */
|
|
ret = i2c_smbus_read_byte_data(client, HYM8563_SEC);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
dev_dbg(&client->dev, "rtc information is %s\n",
|
|
(ret & HYM8563_SEC_VL) ? "invalid" : "valid");
|
|
|
|
hym8563->rtc = devm_rtc_device_register(&client->dev, client->name,
|
|
&hym8563_rtc_ops, THIS_MODULE);
|
|
if (IS_ERR(hym8563->rtc))
|
|
return PTR_ERR(hym8563->rtc);
|
|
|
|
/* the hym8563 alarm only supports a minute accuracy */
|
|
hym8563->rtc->uie_unsupported = 1;
|
|
|
|
#ifdef CONFIG_COMMON_CLK
|
|
hym8563_clkout_register_clk(hym8563);
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct i2c_device_id hym8563_id[] = {
|
|
{ "hym8563", 0 },
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, hym8563_id);
|
|
|
|
static const struct of_device_id hym8563_dt_idtable[] = {
|
|
{ .compatible = "haoyu,hym8563" },
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, hym8563_dt_idtable);
|
|
|
|
static struct i2c_driver hym8563_driver = {
|
|
.driver = {
|
|
.name = "rtc-hym8563",
|
|
.pm = &hym8563_pm_ops,
|
|
.of_match_table = hym8563_dt_idtable,
|
|
},
|
|
.probe = hym8563_probe,
|
|
.id_table = hym8563_id,
|
|
};
|
|
|
|
module_i2c_driver(hym8563_driver);
|
|
|
|
MODULE_AUTHOR("Heiko Stuebner <heiko@sntech.de>");
|
|
MODULE_DESCRIPTION("HYM8563 RTC driver");
|
|
MODULE_LICENSE("GPL");
|