Masahiro Yamada 955d809bde ARM: tegra: Remove redundant ARM_L1_CACHE_SHIFT_6 select ... These two are both ARMv7 SoCs. They need not explicitly select ARM_L1_CACHE_SHIFT_6 because it is enabled along with CPU_V7. Refer to commit a092f2b153 ("ARM: 7291/1: cache: assume 64-byte L1 cachelines for ARMv7 CPUs"). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Thierry Reding <treding@nvidia.com>		2016-04-12 17:09:28 +02:00
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fuse	soc/tegra: fuse: Add spare bit offset for Tegra210	2015-07-16 10:38:31 +02:00
common.c	soc/tegra: Add Tegra210 support	2015-07-16 09:47:59 +02:00
Kconfig	ARM: tegra: Remove redundant ARM_L1_CACHE_SHIFT_6 select	2016-04-12 17:09:28 +02:00
Makefile	soc: tegra: Remove redundant $(CONFIG_ARCH_TEGRA) in Makefile	2015-08-13 16:17:40 +02:00
pmc.c	soc/tegra: pmc: Use existing pclk reference	2015-08-13 16:49:58 +02:00