forked from Minki/linux
588ab3f9af
- Initial page table creation reworked to avoid breaking large block mappings (huge pages) into smaller ones. The ARM architecture requires break-before-make in such cases to avoid TLB conflicts but that's not always possible on live page tables - Kernel virtual memory layout: the kernel image is no longer linked to the bottom of the linear mapping (PAGE_OFFSET) but at the bottom of the vmalloc space, allowing the kernel to be loaded (nearly) anywhere in physical RAM - Kernel ASLR: position independent kernel Image and modules being randomly mapped in the vmalloc space with the randomness is provided by UEFI (efi_get_random_bytes() patches merged via the arm64 tree, acked by Matt Fleming) - Implement relative exception tables for arm64, required by KASLR (initial code for ARCH_HAS_RELATIVE_EXTABLE added to lib/extable.c but actual x86 conversion to deferred to 4.7 because of the merge dependencies) - Support for the User Access Override feature of ARMv8.2: this allows uaccess functions (get_user etc.) to be implemented using LDTR/STTR instructions. Such instructions, when run by the kernel, perform unprivileged accesses adding an extra level of protection. The set_fs() macro is used to "upgrade" such instruction to privileged accesses via the UAO bit - Half-precision floating point support (part of ARMv8.2) - Optimisations for CPUs with or without a hardware prefetcher (using run-time code patching) - copy_page performance improvement to deal with 128 bytes at a time - Sanity checks on the CPU capabilities (via CPUID) to prevent incompatible secondary CPUs from being brought up (e.g. weird big.LITTLE configurations) - valid_user_regs() reworked for better sanity check of the sigcontext information (restored pstate information) - ACPI parking protocol implementation - CONFIG_DEBUG_RODATA enabled by default - VDSO code marked as read-only - DEBUG_PAGEALLOC support - ARCH_HAS_UBSAN_SANITIZE_ALL enabled - Erratum workaround Cavium ThunderX SoC - set_pte_at() fix for PROT_NONE mappings - Code clean-ups -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJW6u95AAoJEGvWsS0AyF7xMyoP/3x2O6bgreSQ84BdO4JChN4+ RQ9OVdX8u2ItO9sgaCY2AA6KoiBuEjGmPl/XRuK0I7DpODTtRjEXQHuNNhz8AelC hn4AEVqamY6Z5BzHFIjs8G9ydEbq+OXcKWEdwSsBhP/cMvI7ss3dps1f5iNPT5Vv 50E/kUz+aWYy7pKlB18VDV7TUOA3SuYuGknWV8+bOY5uPb8hNT3Y3fHOg/EuNNN3 DIuYH1V7XQkXtF+oNVIGxzzJCXULBE7egMcWAm1ydSOHK0JwkZAiL7OhI7ceVD0x YlDxBnqmi4cgzfBzTxITAhn3OParwN6udQprdF1WGtFF6fuY2eRDSH/L/iZoE4DY OulL951OsBtF8YC3+RKLk908/0bA2Uw8ftjCOFJTYbSnZBj1gWK41VkCYMEXiHQk EaN8+2Iw206iYIoyvdjGCLw7Y0oakDoVD9vmv12SOaHeQljTkjoN8oIlfjjKTeP7 3AXj5v9BDMDVh40nkVayysRNvqe48Kwt9Wn0rhVTLxwdJEiFG/OIU6HLuTkretdN dcCNFSQrRieSFHpBK9G0vKIpIss1ZwLm8gjocVXH7VK4Mo/TNQe4p2/wAF29mq4r xu1UiXmtU3uWxiqZnt72LOYFCarQ0sFA5+pMEvF5W+NrVB0wGpXhcwm+pGsIi4IM LepccTgykiUBqW5TRzPz =/oS+ -----END PGP SIGNATURE----- Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Catalin Marinas: "Here are the main arm64 updates for 4.6. There are some relatively intrusive changes to support KASLR, the reworking of the kernel virtual memory layout and initial page table creation. Summary: - Initial page table creation reworked to avoid breaking large block mappings (huge pages) into smaller ones. The ARM architecture requires break-before-make in such cases to avoid TLB conflicts but that's not always possible on live page tables - Kernel virtual memory layout: the kernel image is no longer linked to the bottom of the linear mapping (PAGE_OFFSET) but at the bottom of the vmalloc space, allowing the kernel to be loaded (nearly) anywhere in physical RAM - Kernel ASLR: position independent kernel Image and modules being randomly mapped in the vmalloc space with the randomness is provided by UEFI (efi_get_random_bytes() patches merged via the arm64 tree, acked by Matt Fleming) - Implement relative exception tables for arm64, required by KASLR (initial code for ARCH_HAS_RELATIVE_EXTABLE added to lib/extable.c but actual x86 conversion to deferred to 4.7 because of the merge dependencies) - Support for the User Access Override feature of ARMv8.2: this allows uaccess functions (get_user etc.) to be implemented using LDTR/STTR instructions. Such instructions, when run by the kernel, perform unprivileged accesses adding an extra level of protection. The set_fs() macro is used to "upgrade" such instruction to privileged accesses via the UAO bit - Half-precision floating point support (part of ARMv8.2) - Optimisations for CPUs with or without a hardware prefetcher (using run-time code patching) - copy_page performance improvement to deal with 128 bytes at a time - Sanity checks on the CPU capabilities (via CPUID) to prevent incompatible secondary CPUs from being brought up (e.g. weird big.LITTLE configurations) - valid_user_regs() reworked for better sanity check of the sigcontext information (restored pstate information) - ACPI parking protocol implementation - CONFIG_DEBUG_RODATA enabled by default - VDSO code marked as read-only - DEBUG_PAGEALLOC support - ARCH_HAS_UBSAN_SANITIZE_ALL enabled - Erratum workaround Cavium ThunderX SoC - set_pte_at() fix for PROT_NONE mappings - Code clean-ups" * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (99 commits) arm64: kasan: Fix zero shadow mapping overriding kernel image shadow arm64: kasan: Use actual memory node when populating the kernel image shadow arm64: Update PTE_RDONLY in set_pte_at() for PROT_NONE permission arm64: Fix misspellings in comments. arm64: efi: add missing frame pointer assignment arm64: make mrs_s prefixing implicit in read_cpuid arm64: enable CONFIG_DEBUG_RODATA by default arm64: Rework valid_user_regs arm64: mm: check at build time that PAGE_OFFSET divides the VA space evenly arm64: KVM: Move kvm_call_hyp back to its original localtion arm64: mm: treat memstart_addr as a signed quantity arm64: mm: list kernel sections in order arm64: lse: deal with clobbered IP registers after branch via PLT arm64: mm: dump: Use VA_START directly instead of private LOWEST_ADDR arm64: kconfig: add submenu for 8.2 architectural features arm64: kernel: acpi: fix ioremap in ACPI parking protocol cpu_postboot arm64: Add support for Half precision floating point arm64: Remove fixmap include fragility arm64: Add workaround for Cavium erratum 27456 arm64: mm: Mark .rodata as RO ...
420 lines
11 KiB
C
420 lines
11 KiB
C
/*
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* Based on arch/arm/kernel/setup.c
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*
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* Copyright (C) 1995-2001 Russell King
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/acpi.h>
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#include <linux/export.h>
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#include <linux/kernel.h>
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#include <linux/stddef.h>
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#include <linux/ioport.h>
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#include <linux/delay.h>
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#include <linux/utsname.h>
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#include <linux/initrd.h>
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#include <linux/console.h>
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#include <linux/cache.h>
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#include <linux/bootmem.h>
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#include <linux/screen_info.h>
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#include <linux/init.h>
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#include <linux/kexec.h>
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#include <linux/crash_dump.h>
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#include <linux/root_dev.h>
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#include <linux/cpu.h>
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#include <linux/interrupt.h>
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#include <linux/smp.h>
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#include <linux/fs.h>
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#include <linux/proc_fs.h>
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#include <linux/memblock.h>
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#include <linux/of_iommu.h>
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#include <linux/of_fdt.h>
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#include <linux/of_platform.h>
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#include <linux/efi.h>
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#include <linux/psci.h>
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#include <asm/acpi.h>
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#include <asm/fixmap.h>
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#include <asm/cpu.h>
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#include <asm/cputype.h>
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#include <asm/elf.h>
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#include <asm/cpufeature.h>
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#include <asm/cpu_ops.h>
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#include <asm/kasan.h>
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#include <asm/sections.h>
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#include <asm/setup.h>
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#include <asm/smp_plat.h>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#include <asm/traps.h>
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#include <asm/memblock.h>
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#include <asm/efi.h>
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#include <asm/xen/hypervisor.h>
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#include <asm/mmu_context.h>
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phys_addr_t __fdt_pointer __initdata;
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/*
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* Standard memory resources
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*/
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static struct resource mem_res[] = {
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{
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.name = "Kernel code",
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.start = 0,
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.end = 0,
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.flags = IORESOURCE_SYSTEM_RAM
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},
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{
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.name = "Kernel data",
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.start = 0,
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.end = 0,
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.flags = IORESOURCE_SYSTEM_RAM
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}
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};
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#define kernel_code mem_res[0]
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#define kernel_data mem_res[1]
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/*
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* The recorded values of x0 .. x3 upon kernel entry.
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*/
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u64 __cacheline_aligned boot_args[4];
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void __init smp_setup_processor_id(void)
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{
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u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
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cpu_logical_map(0) = mpidr;
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/*
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* clear __my_cpu_offset on boot CPU to avoid hang caused by
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* using percpu variable early, for example, lockdep will
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* access percpu variable inside lock_release
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*/
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set_my_cpu_offset(0);
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pr_info("Booting Linux on physical CPU 0x%lx\n", (unsigned long)mpidr);
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}
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bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
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{
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return phys_id == cpu_logical_map(cpu);
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}
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struct mpidr_hash mpidr_hash;
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/**
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* smp_build_mpidr_hash - Pre-compute shifts required at each affinity
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* level in order to build a linear index from an
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* MPIDR value. Resulting algorithm is a collision
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* free hash carried out through shifting and ORing
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*/
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static void __init smp_build_mpidr_hash(void)
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{
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u32 i, affinity, fs[4], bits[4], ls;
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u64 mask = 0;
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/*
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* Pre-scan the list of MPIDRS and filter out bits that do
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* not contribute to affinity levels, ie they never toggle.
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*/
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for_each_possible_cpu(i)
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mask |= (cpu_logical_map(i) ^ cpu_logical_map(0));
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pr_debug("mask of set bits %#llx\n", mask);
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/*
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* Find and stash the last and first bit set at all affinity levels to
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* check how many bits are required to represent them.
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*/
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for (i = 0; i < 4; i++) {
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affinity = MPIDR_AFFINITY_LEVEL(mask, i);
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/*
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* Find the MSB bit and LSB bits position
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* to determine how many bits are required
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* to express the affinity level.
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*/
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ls = fls(affinity);
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fs[i] = affinity ? ffs(affinity) - 1 : 0;
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bits[i] = ls - fs[i];
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}
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/*
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* An index can be created from the MPIDR_EL1 by isolating the
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* significant bits at each affinity level and by shifting
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* them in order to compress the 32 bits values space to a
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* compressed set of values. This is equivalent to hashing
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* the MPIDR_EL1 through shifting and ORing. It is a collision free
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* hash though not minimal since some levels might contain a number
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* of CPUs that is not an exact power of 2 and their bit
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* representation might contain holes, eg MPIDR_EL1[7:0] = {0x2, 0x80}.
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*/
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mpidr_hash.shift_aff[0] = MPIDR_LEVEL_SHIFT(0) + fs[0];
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mpidr_hash.shift_aff[1] = MPIDR_LEVEL_SHIFT(1) + fs[1] - bits[0];
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mpidr_hash.shift_aff[2] = MPIDR_LEVEL_SHIFT(2) + fs[2] -
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(bits[1] + bits[0]);
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mpidr_hash.shift_aff[3] = MPIDR_LEVEL_SHIFT(3) +
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fs[3] - (bits[2] + bits[1] + bits[0]);
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mpidr_hash.mask = mask;
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mpidr_hash.bits = bits[3] + bits[2] + bits[1] + bits[0];
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pr_debug("MPIDR hash: aff0[%u] aff1[%u] aff2[%u] aff3[%u] mask[%#llx] bits[%u]\n",
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mpidr_hash.shift_aff[0],
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mpidr_hash.shift_aff[1],
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mpidr_hash.shift_aff[2],
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mpidr_hash.shift_aff[3],
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mpidr_hash.mask,
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mpidr_hash.bits);
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/*
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* 4x is an arbitrary value used to warn on a hash table much bigger
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* than expected on most systems.
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*/
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if (mpidr_hash_size() > 4 * num_possible_cpus())
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pr_warn("Large number of MPIDR hash buckets detected\n");
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__flush_dcache_area(&mpidr_hash, sizeof(struct mpidr_hash));
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}
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static void __init setup_machine_fdt(phys_addr_t dt_phys)
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{
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void *dt_virt = fixmap_remap_fdt(dt_phys);
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if (!dt_virt || !early_init_dt_scan(dt_virt)) {
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pr_crit("\n"
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"Error: invalid device tree blob at physical address %pa (virtual address 0x%p)\n"
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"The dtb must be 8-byte aligned and must not exceed 2 MB in size\n"
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"\nPlease check your bootloader.",
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&dt_phys, dt_virt);
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while (true)
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cpu_relax();
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}
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dump_stack_set_arch_desc("%s (DT)", of_flat_dt_get_machine_name());
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}
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static void __init request_standard_resources(void)
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{
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struct memblock_region *region;
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struct resource *res;
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kernel_code.start = virt_to_phys(_text);
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kernel_code.end = virt_to_phys(_etext - 1);
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kernel_data.start = virt_to_phys(_sdata);
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kernel_data.end = virt_to_phys(_end - 1);
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for_each_memblock(memory, region) {
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res = alloc_bootmem_low(sizeof(*res));
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res->name = "System RAM";
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res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
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res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
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res->flags = IORESOURCE_SYSTEM_RAM | IORESOURCE_BUSY;
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request_resource(&iomem_resource, res);
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if (kernel_code.start >= res->start &&
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kernel_code.end <= res->end)
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request_resource(res, &kernel_code);
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if (kernel_data.start >= res->start &&
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kernel_data.end <= res->end)
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request_resource(res, &kernel_data);
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}
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}
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#ifdef CONFIG_BLK_DEV_INITRD
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/*
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* Relocate initrd if it is not completely within the linear mapping.
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* This would be the case if mem= cuts out all or part of it.
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*/
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static void __init relocate_initrd(void)
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{
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phys_addr_t orig_start = __virt_to_phys(initrd_start);
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phys_addr_t orig_end = __virt_to_phys(initrd_end);
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phys_addr_t ram_end = memblock_end_of_DRAM();
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phys_addr_t new_start;
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unsigned long size, to_free = 0;
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void *dest;
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if (orig_end <= ram_end)
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return;
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/*
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* Any of the original initrd which overlaps the linear map should
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* be freed after relocating.
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*/
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if (orig_start < ram_end)
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to_free = ram_end - orig_start;
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size = orig_end - orig_start;
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if (!size)
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return;
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/* initrd needs to be relocated completely inside linear mapping */
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new_start = memblock_find_in_range(0, PFN_PHYS(max_pfn),
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size, PAGE_SIZE);
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if (!new_start)
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panic("Cannot relocate initrd of size %ld\n", size);
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memblock_reserve(new_start, size);
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initrd_start = __phys_to_virt(new_start);
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initrd_end = initrd_start + size;
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pr_info("Moving initrd from [%llx-%llx] to [%llx-%llx]\n",
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orig_start, orig_start + size - 1,
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new_start, new_start + size - 1);
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dest = (void *)initrd_start;
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if (to_free) {
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memcpy(dest, (void *)__phys_to_virt(orig_start), to_free);
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dest += to_free;
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}
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copy_from_early_mem(dest, orig_start + to_free, size - to_free);
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if (to_free) {
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pr_info("Freeing original RAMDISK from [%llx-%llx]\n",
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orig_start, orig_start + to_free - 1);
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memblock_free(orig_start, to_free);
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}
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}
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#else
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static inline void __init relocate_initrd(void)
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{
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}
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#endif
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u64 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = INVALID_HWID };
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void __init setup_arch(char **cmdline_p)
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{
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pr_info("Boot CPU: AArch64 Processor [%08x]\n", read_cpuid_id());
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sprintf(init_utsname()->machine, ELF_PLATFORM);
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init_mm.start_code = (unsigned long) _text;
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init_mm.end_code = (unsigned long) _etext;
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init_mm.end_data = (unsigned long) _edata;
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init_mm.brk = (unsigned long) _end;
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*cmdline_p = boot_command_line;
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early_fixmap_init();
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early_ioremap_init();
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setup_machine_fdt(__fdt_pointer);
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parse_early_param();
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/*
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* Unmask asynchronous aborts after bringing up possible earlycon.
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* (Report possible System Errors once we can report this occurred)
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*/
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local_async_enable();
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/*
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* TTBR0 is only used for the identity mapping at this stage. Make it
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* point to zero page to avoid speculatively fetching new entries.
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*/
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cpu_uninstall_idmap();
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efi_init();
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arm64_memblock_init();
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/* Parse the ACPI tables for possible boot-time configuration */
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acpi_boot_table_init();
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paging_init();
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relocate_initrd();
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kasan_init();
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request_standard_resources();
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early_ioremap_reset();
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if (acpi_disabled) {
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unflatten_device_tree();
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psci_dt_init();
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} else {
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psci_acpi_init();
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}
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xen_early_init();
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cpu_read_bootcpu_ops();
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smp_init_cpus();
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smp_build_mpidr_hash();
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#ifdef CONFIG_VT
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#if defined(CONFIG_VGA_CONSOLE)
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conswitchp = &vga_con;
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#elif defined(CONFIG_DUMMY_CONSOLE)
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conswitchp = &dummy_con;
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#endif
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#endif
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if (boot_args[1] || boot_args[2] || boot_args[3]) {
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pr_err("WARNING: x1-x3 nonzero in violation of boot protocol:\n"
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"\tx1: %016llx\n\tx2: %016llx\n\tx3: %016llx\n"
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"This indicates a broken bootloader or old kernel\n",
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boot_args[1], boot_args[2], boot_args[3]);
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}
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}
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static int __init arm64_device_init(void)
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{
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if (of_have_populated_dt()) {
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of_iommu_init();
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of_platform_populate(NULL, of_default_bus_match_table,
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|
NULL, NULL);
|
|
} else if (acpi_disabled) {
|
|
pr_crit("Device tree not populated\n");
|
|
}
|
|
return 0;
|
|
}
|
|
arch_initcall_sync(arm64_device_init);
|
|
|
|
static int __init topology_init(void)
|
|
{
|
|
int i;
|
|
|
|
for_each_possible_cpu(i) {
|
|
struct cpu *cpu = &per_cpu(cpu_data.cpu, i);
|
|
cpu->hotpluggable = 1;
|
|
register_cpu(cpu, i);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
subsys_initcall(topology_init);
|
|
|
|
/*
|
|
* Dump out kernel offset information on panic.
|
|
*/
|
|
static int dump_kernel_offset(struct notifier_block *self, unsigned long v,
|
|
void *p)
|
|
{
|
|
u64 const kaslr_offset = kimage_vaddr - KIMAGE_VADDR;
|
|
|
|
if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && kaslr_offset > 0) {
|
|
pr_emerg("Kernel Offset: 0x%llx from 0x%lx\n",
|
|
kaslr_offset, KIMAGE_VADDR);
|
|
} else {
|
|
pr_emerg("Kernel Offset: disabled\n");
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static struct notifier_block kernel_offset_notifier = {
|
|
.notifier_call = dump_kernel_offset
|
|
};
|
|
|
|
static int __init register_kernel_offset_dumper(void)
|
|
{
|
|
atomic_notifier_chain_register(&panic_notifier_list,
|
|
&kernel_offset_notifier);
|
|
return 0;
|
|
}
|
|
__initcall(register_kernel_offset_dumper);
|