forked from Minki/linux
bfd927ffa2
Add md5 sha1 sha256 support for crypto engine in rk3288. Signed-off-by: Zain Wang <zain.wang@rock-chips.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
413 lines
10 KiB
C
413 lines
10 KiB
C
/*
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* Crypto acceleration support for Rockchip RK3288
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*
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* Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
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*
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* Author: Zain Wang <zain.wang@rock-chips.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* Some ideas are from marvell-cesa.c and s5p-sss.c driver.
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*/
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#include "rk3288_crypto.h"
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/clk.h>
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#include <linux/crypto.h>
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#include <linux/reset.h>
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static int rk_crypto_enable_clk(struct rk_crypto_info *dev)
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{
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int err;
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err = clk_prepare_enable(dev->sclk);
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if (err) {
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dev_err(dev->dev, "[%s:%d], Couldn't enable clock sclk\n",
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__func__, __LINE__);
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goto err_return;
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}
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err = clk_prepare_enable(dev->aclk);
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if (err) {
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dev_err(dev->dev, "[%s:%d], Couldn't enable clock aclk\n",
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__func__, __LINE__);
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goto err_aclk;
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}
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err = clk_prepare_enable(dev->hclk);
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if (err) {
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dev_err(dev->dev, "[%s:%d], Couldn't enable clock hclk\n",
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__func__, __LINE__);
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goto err_hclk;
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}
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err = clk_prepare_enable(dev->dmaclk);
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if (err) {
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dev_err(dev->dev, "[%s:%d], Couldn't enable clock dmaclk\n",
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__func__, __LINE__);
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goto err_dmaclk;
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}
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return err;
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err_dmaclk:
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clk_disable_unprepare(dev->hclk);
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err_hclk:
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clk_disable_unprepare(dev->aclk);
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err_aclk:
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clk_disable_unprepare(dev->sclk);
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err_return:
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return err;
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}
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static void rk_crypto_disable_clk(struct rk_crypto_info *dev)
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{
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clk_disable_unprepare(dev->dmaclk);
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clk_disable_unprepare(dev->hclk);
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clk_disable_unprepare(dev->aclk);
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clk_disable_unprepare(dev->sclk);
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}
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static int check_alignment(struct scatterlist *sg_src,
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struct scatterlist *sg_dst,
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int align_mask)
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{
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int in, out, align;
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in = IS_ALIGNED((uint32_t)sg_src->offset, 4) &&
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IS_ALIGNED((uint32_t)sg_src->length, align_mask);
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if (!sg_dst)
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return in;
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out = IS_ALIGNED((uint32_t)sg_dst->offset, 4) &&
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IS_ALIGNED((uint32_t)sg_dst->length, align_mask);
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align = in && out;
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return (align && (sg_src->length == sg_dst->length));
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}
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static int rk_load_data(struct rk_crypto_info *dev,
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struct scatterlist *sg_src,
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struct scatterlist *sg_dst)
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{
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unsigned int count;
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dev->aligned = dev->aligned ?
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check_alignment(sg_src, sg_dst, dev->align_size) :
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dev->aligned;
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if (dev->aligned) {
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count = min(dev->left_bytes, sg_src->length);
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dev->left_bytes -= count;
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if (!dma_map_sg(dev->dev, sg_src, 1, DMA_TO_DEVICE)) {
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dev_err(dev->dev, "[%s:%d] dma_map_sg(src) error\n",
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__func__, __LINE__);
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return -EINVAL;
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}
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dev->addr_in = sg_dma_address(sg_src);
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if (sg_dst) {
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if (!dma_map_sg(dev->dev, sg_dst, 1, DMA_FROM_DEVICE)) {
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dev_err(dev->dev,
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"[%s:%d] dma_map_sg(dst) error\n",
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__func__, __LINE__);
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dma_unmap_sg(dev->dev, sg_src, 1,
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DMA_TO_DEVICE);
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return -EINVAL;
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}
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dev->addr_out = sg_dma_address(sg_dst);
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}
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} else {
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count = (dev->left_bytes > PAGE_SIZE) ?
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PAGE_SIZE : dev->left_bytes;
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if (!sg_pcopy_to_buffer(dev->first, dev->nents,
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dev->addr_vir, count,
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dev->total - dev->left_bytes)) {
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dev_err(dev->dev, "[%s:%d] pcopy err\n",
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__func__, __LINE__);
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return -EINVAL;
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}
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dev->left_bytes -= count;
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sg_init_one(&dev->sg_tmp, dev->addr_vir, count);
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if (!dma_map_sg(dev->dev, &dev->sg_tmp, 1, DMA_TO_DEVICE)) {
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dev_err(dev->dev, "[%s:%d] dma_map_sg(sg_tmp) error\n",
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__func__, __LINE__);
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return -ENOMEM;
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}
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dev->addr_in = sg_dma_address(&dev->sg_tmp);
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if (sg_dst) {
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if (!dma_map_sg(dev->dev, &dev->sg_tmp, 1,
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DMA_FROM_DEVICE)) {
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dev_err(dev->dev,
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"[%s:%d] dma_map_sg(sg_tmp) error\n",
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__func__, __LINE__);
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dma_unmap_sg(dev->dev, &dev->sg_tmp, 1,
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DMA_TO_DEVICE);
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return -ENOMEM;
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}
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dev->addr_out = sg_dma_address(&dev->sg_tmp);
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}
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}
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dev->count = count;
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return 0;
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}
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static void rk_unload_data(struct rk_crypto_info *dev)
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{
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struct scatterlist *sg_in, *sg_out;
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sg_in = dev->aligned ? dev->sg_src : &dev->sg_tmp;
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dma_unmap_sg(dev->dev, sg_in, 1, DMA_TO_DEVICE);
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if (dev->sg_dst) {
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sg_out = dev->aligned ? dev->sg_dst : &dev->sg_tmp;
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dma_unmap_sg(dev->dev, sg_out, 1, DMA_FROM_DEVICE);
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}
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}
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static irqreturn_t rk_crypto_irq_handle(int irq, void *dev_id)
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{
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struct rk_crypto_info *dev = platform_get_drvdata(dev_id);
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u32 interrupt_status;
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int err = 0;
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spin_lock(&dev->lock);
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interrupt_status = CRYPTO_READ(dev, RK_CRYPTO_INTSTS);
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CRYPTO_WRITE(dev, RK_CRYPTO_INTSTS, interrupt_status);
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if (interrupt_status & 0x0a) {
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dev_warn(dev->dev, "DMA Error\n");
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err = -EFAULT;
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} else if (interrupt_status & 0x05) {
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err = dev->update(dev);
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}
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if (err)
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dev->complete(dev, err);
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spin_unlock(&dev->lock);
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return IRQ_HANDLED;
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}
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static void rk_crypto_tasklet_cb(unsigned long data)
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{
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struct rk_crypto_info *dev = (struct rk_crypto_info *)data;
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struct crypto_async_request *async_req, *backlog;
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unsigned long flags;
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int err = 0;
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spin_lock_irqsave(&dev->lock, flags);
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backlog = crypto_get_backlog(&dev->queue);
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async_req = crypto_dequeue_request(&dev->queue);
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spin_unlock_irqrestore(&dev->lock, flags);
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if (!async_req) {
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dev_err(dev->dev, "async_req is NULL !!\n");
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return;
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}
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if (backlog) {
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backlog->complete(backlog, -EINPROGRESS);
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backlog = NULL;
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}
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if (crypto_tfm_alg_type(async_req->tfm) == CRYPTO_ALG_TYPE_ABLKCIPHER)
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dev->ablk_req = ablkcipher_request_cast(async_req);
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else
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dev->ahash_req = ahash_request_cast(async_req);
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err = dev->start(dev);
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if (err)
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dev->complete(dev, err);
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}
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static struct rk_crypto_tmp *rk_cipher_algs[] = {
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&rk_ecb_aes_alg,
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&rk_cbc_aes_alg,
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&rk_ecb_des_alg,
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&rk_cbc_des_alg,
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&rk_ecb_des3_ede_alg,
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&rk_cbc_des3_ede_alg,
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&rk_ahash_sha1,
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&rk_ahash_sha256,
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&rk_ahash_md5,
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};
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static int rk_crypto_register(struct rk_crypto_info *crypto_info)
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{
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unsigned int i, k;
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int err = 0;
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for (i = 0; i < ARRAY_SIZE(rk_cipher_algs); i++) {
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rk_cipher_algs[i]->dev = crypto_info;
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if (rk_cipher_algs[i]->type == ALG_TYPE_CIPHER)
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err = crypto_register_alg(
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&rk_cipher_algs[i]->alg.crypto);
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else
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err = crypto_register_ahash(
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&rk_cipher_algs[i]->alg.hash);
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if (err)
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goto err_cipher_algs;
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}
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return 0;
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err_cipher_algs:
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for (k = 0; k < i; k++) {
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if (rk_cipher_algs[i]->type == ALG_TYPE_CIPHER)
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crypto_unregister_alg(&rk_cipher_algs[k]->alg.crypto);
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else
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crypto_unregister_ahash(&rk_cipher_algs[i]->alg.hash);
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}
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return err;
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}
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static void rk_crypto_unregister(void)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(rk_cipher_algs); i++) {
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if (rk_cipher_algs[i]->type == ALG_TYPE_CIPHER)
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crypto_unregister_alg(&rk_cipher_algs[i]->alg.crypto);
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else
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crypto_unregister_ahash(&rk_cipher_algs[i]->alg.hash);
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}
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}
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static void rk_crypto_action(void *data)
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{
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struct rk_crypto_info *crypto_info = data;
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reset_control_assert(crypto_info->rst);
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}
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static const struct of_device_id crypto_of_id_table[] = {
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{ .compatible = "rockchip,rk3288-crypto" },
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{}
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};
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MODULE_DEVICE_TABLE(of, crypto_of_id_table);
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static int rk_crypto_probe(struct platform_device *pdev)
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{
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struct resource *res;
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struct device *dev = &pdev->dev;
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struct rk_crypto_info *crypto_info;
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int err = 0;
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crypto_info = devm_kzalloc(&pdev->dev,
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sizeof(*crypto_info), GFP_KERNEL);
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if (!crypto_info) {
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err = -ENOMEM;
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goto err_crypto;
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}
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crypto_info->rst = devm_reset_control_get(dev, "crypto-rst");
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if (IS_ERR(crypto_info->rst)) {
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err = PTR_ERR(crypto_info->rst);
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goto err_crypto;
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}
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reset_control_assert(crypto_info->rst);
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usleep_range(10, 20);
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reset_control_deassert(crypto_info->rst);
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err = devm_add_action(dev, rk_crypto_action, crypto_info);
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if (err) {
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reset_control_assert(crypto_info->rst);
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goto err_crypto;
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}
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spin_lock_init(&crypto_info->lock);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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crypto_info->reg = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(crypto_info->reg)) {
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err = PTR_ERR(crypto_info->reg);
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goto err_crypto;
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}
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crypto_info->aclk = devm_clk_get(&pdev->dev, "aclk");
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if (IS_ERR(crypto_info->aclk)) {
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err = PTR_ERR(crypto_info->aclk);
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goto err_crypto;
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}
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crypto_info->hclk = devm_clk_get(&pdev->dev, "hclk");
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if (IS_ERR(crypto_info->hclk)) {
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err = PTR_ERR(crypto_info->hclk);
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goto err_crypto;
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}
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crypto_info->sclk = devm_clk_get(&pdev->dev, "sclk");
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if (IS_ERR(crypto_info->sclk)) {
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err = PTR_ERR(crypto_info->sclk);
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goto err_crypto;
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}
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crypto_info->dmaclk = devm_clk_get(&pdev->dev, "apb_pclk");
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if (IS_ERR(crypto_info->dmaclk)) {
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err = PTR_ERR(crypto_info->dmaclk);
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goto err_crypto;
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}
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crypto_info->irq = platform_get_irq(pdev, 0);
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if (crypto_info->irq < 0) {
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dev_warn(crypto_info->dev,
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"control Interrupt is not available.\n");
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err = crypto_info->irq;
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goto err_crypto;
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}
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err = devm_request_irq(&pdev->dev, crypto_info->irq,
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rk_crypto_irq_handle, IRQF_SHARED,
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"rk-crypto", pdev);
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if (err) {
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dev_err(crypto_info->dev, "irq request failed.\n");
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goto err_crypto;
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}
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crypto_info->dev = &pdev->dev;
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platform_set_drvdata(pdev, crypto_info);
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tasklet_init(&crypto_info->crypto_tasklet,
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rk_crypto_tasklet_cb, (unsigned long)crypto_info);
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crypto_init_queue(&crypto_info->queue, 50);
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crypto_info->enable_clk = rk_crypto_enable_clk;
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crypto_info->disable_clk = rk_crypto_disable_clk;
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crypto_info->load_data = rk_load_data;
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crypto_info->unload_data = rk_unload_data;
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err = rk_crypto_register(crypto_info);
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if (err) {
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dev_err(dev, "err in register alg");
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goto err_register_alg;
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}
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dev_info(dev, "Crypto Accelerator successfully registered\n");
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return 0;
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err_register_alg:
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tasklet_kill(&crypto_info->crypto_tasklet);
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err_crypto:
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return err;
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}
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static int rk_crypto_remove(struct platform_device *pdev)
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{
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struct rk_crypto_info *crypto_tmp = platform_get_drvdata(pdev);
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rk_crypto_unregister();
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tasklet_kill(&crypto_tmp->crypto_tasklet);
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return 0;
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}
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static struct platform_driver crypto_driver = {
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.probe = rk_crypto_probe,
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.remove = rk_crypto_remove,
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.driver = {
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.name = "rk3288-crypto",
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.of_match_table = crypto_of_id_table,
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},
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};
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module_platform_driver(crypto_driver);
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MODULE_AUTHOR("Zain Wang <zain.wang@rock-chips.com>");
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MODULE_DESCRIPTION("Support for Rockchip's cryptographic engine");
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MODULE_LICENSE("GPL");
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