MPLLs are adjustable rate clocks derived from PLLs. On both Meson8b and GXBB they appear to be only derived from fixed_pll. Add support for these clock types so that they can be added to their respective drivers. Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> |
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.. | ||
clk-cpu.c | ||
clk-mpll.c | ||
clk-pll.c | ||
clkc.h | ||
Kconfig | ||
Makefile | ||
meson8b-clkc.c |