forked from Minki/linux
34d0b02e08
Before the new real-mode code infrastructure %edx was used for testing CD and NW bits with andl in order to decide whether to flush the processor caches or not. The value of cr0 was also stored in %eax, which was later used to set cr0 after masking out lower byte (except TS bit) in order to enter real-mode. In the new real-mode code infrastructure we wanted to keep input parameter in %eax so we are using %edx for both cr0 cases. This has caused regression since andl overwrites the value of %edx. This patch fixes the issue by replacing andl with testl, which is essentially andl without writing result to the register. Special thanks to Paolo Bonzini for noting this and proposing a fix. Reported-and-tested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@intel.com> Link: http://lkml.kernel.org/r/1336633898-23743-1-git-send-email-jarkko.sakkinen@intel.com Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
133 lines
3.5 KiB
ArmAsm
133 lines
3.5 KiB
ArmAsm
#include <linux/linkage.h>
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#include <linux/init.h>
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#include <asm/segment.h>
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#include <asm/page_types.h>
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#include "realmode.h"
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/*
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* The following code and data reboots the machine by switching to real
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* mode and jumping to the BIOS reset entry point, as if the CPU has
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* really been reset. The previous version asked the keyboard
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* controller to pulse the CPU reset line, which is more thorough, but
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* doesn't work with at least one type of 486 motherboard. It is easy
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* to stop this code working; hence the copious comments.
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*
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* This code is called with the restart type (0 = BIOS, 1 = APM) in %eax.
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*/
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.section ".text32", "ax"
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.code32
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.balign 16
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ENTRY(machine_real_restart_asm)
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/* Set up the IDT for real mode. */
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lidtl pa_machine_real_restart_idt
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/*
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* Set up a GDT from which we can load segment descriptors for real
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* mode. The GDT is not used in real mode; it is just needed here to
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* prepare the descriptors.
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*/
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lgdtl pa_machine_real_restart_gdt
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/*
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* Load the data segment registers with 16-bit compatible values
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*/
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movl $16, %ecx
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movl %ecx, %ds
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movl %ecx, %es
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movl %ecx, %fs
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movl %ecx, %gs
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movl %ecx, %ss
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ljmpw $8, $1f
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/*
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* This is 16-bit protected mode code to disable paging and the cache,
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* switch to real mode and jump to the BIOS reset code.
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*
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* The instruction that switches to real mode by writing to CR0 must be
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* followed immediately by a far jump instruction, which set CS to a
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* valid value for real mode, and flushes the prefetch queue to avoid
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* running instructions that have already been decoded in protected
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* mode.
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*
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* Clears all the flags except ET, especially PG (paging), PE
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* (protected-mode enable) and TS (task switch for coprocessor state
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* save). Flushes the TLB after paging has been disabled. Sets CD and
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* NW, to disable the cache on a 486, and invalidates the cache. This
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* is more like the state of a 486 after reset. I don't know if
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* something else should be done for other chips.
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*
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* More could be done here to set up the registers as if a CPU reset had
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* occurred; hopefully real BIOSs don't assume much. This is not the
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* actual BIOS entry point, anyway (that is at 0xfffffff0).
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*
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* Most of this work is probably excessive, but it is what is tested.
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*/
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.text
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.code16
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.balign 16
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machine_real_restart_asm16:
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1:
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xorl %ecx, %ecx
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movl %cr0, %edx
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andl $0x00000011, %edx
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orl $0x60000000, %edx
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movl %edx, %cr0
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movl %ecx, %cr3
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movl %cr0, %edx
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testl $0x60000000, %edx /* If no cache bits -> no wbinvd */
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jz 2f
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wbinvd
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2:
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andb $0x10, %dl
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movl %edx, %cr0
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LJMPW_RM(3f)
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3:
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andw %ax, %ax
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jz bios
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apm:
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movw $0x1000, %ax
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movw %ax, %ss
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movw $0xf000, %sp
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movw $0x5307, %ax
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movw $0x0001, %bx
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movw $0x0003, %cx
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int $0x15
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/* This should never return... */
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bios:
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ljmpw $0xf000, $0xfff0
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.section ".rodata", "a"
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.balign 16
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GLOBAL(machine_real_restart_idt)
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.word 0xffff /* Length - real mode default value */
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.long 0 /* Base - real mode default value */
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END(machine_real_restart_idt)
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.balign 16
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GLOBAL(machine_real_restart_gdt)
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/* Self-pointer */
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.word 0xffff /* Length - real mode default value */
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.long pa_machine_real_restart_gdt
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.word 0
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/*
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* 16-bit code segment pointing to real_mode_seg
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* Selector value 8
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*/
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.word 0xffff /* Limit */
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.long 0x9b000000 + pa_real_mode_base
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.word 0
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/*
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* 16-bit data segment with the selector value 16 = 0x10 and
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* base value 0x100; since this is consistent with real mode
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* semantics we don't have to reload the segments once CR0.PE = 0.
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*/
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.quad GDT_ENTRY(0x0093, 0x100, 0xffff)
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END(machine_real_restart_gdt)
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