forked from Minki/linux
41bd5b5d22
Remove the local_{async,fiq}_{en,dis}able macros as they don't respect
our newly defined order and are only used to set the flags for process
context when we bring CPUs online.
Add a helper to do this. The IRQ flag varies as we want it masked on
the boot CPU until we are ready to handle interrupts.
The boot CPU unmasks SError during early boot once it can print an error
message. If we can print an error message about SError, we can do the
same for FIQ. Debug exceptions are already enabled by __cpu_setup(),
which has also configured MDSCR_EL1 to disable MDE and KDE.
Signed-off-by: James Morse <james.morse@arm.com>
Reviewed-by: Julien Thierry <julien.thierry@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
101 lines
2.3 KiB
C
101 lines
2.3 KiB
C
/*
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_IRQFLAGS_H
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#define __ASM_IRQFLAGS_H
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#ifdef __KERNEL__
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#include <asm/ptrace.h>
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/*
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* Aarch64 has flags for masking: Debug, Asynchronous (serror), Interrupts and
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* FIQ exceptions, in the 'daif' register. We mask and unmask them in 'dai'
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* order:
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* Masking debug exceptions causes all other exceptions to be masked too/
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* Masking SError masks irq, but not debug exceptions. Masking irqs has no
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* side effects for other flags. Keeping to this order makes it easier for
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* entry.S to know which exceptions should be unmasked.
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*
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* FIQ is never expected, but we mask it when we disable debug exceptions, and
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* unmask it at all other times.
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*/
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/*
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* CPU interrupt mask handling.
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*/
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static inline unsigned long arch_local_irq_save(void)
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{
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unsigned long flags;
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asm volatile(
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"mrs %0, daif // arch_local_irq_save\n"
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"msr daifset, #2"
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: "=r" (flags)
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:
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: "memory");
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return flags;
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}
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static inline void arch_local_irq_enable(void)
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{
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asm volatile(
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"msr daifclr, #2 // arch_local_irq_enable"
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:
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:
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: "memory");
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}
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static inline void arch_local_irq_disable(void)
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{
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asm volatile(
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"msr daifset, #2 // arch_local_irq_disable"
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:
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:
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: "memory");
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}
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/*
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* Save the current interrupt enable state.
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*/
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static inline unsigned long arch_local_save_flags(void)
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{
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unsigned long flags;
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asm volatile(
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"mrs %0, daif // arch_local_save_flags"
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: "=r" (flags)
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:
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: "memory");
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return flags;
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}
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/*
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* restore saved IRQ state
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*/
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static inline void arch_local_irq_restore(unsigned long flags)
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{
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asm volatile(
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"msr daif, %0 // arch_local_irq_restore"
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:
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: "r" (flags)
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: "memory");
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}
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static inline int arch_irqs_disabled_flags(unsigned long flags)
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{
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return flags & PSR_I_BIT;
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}
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#endif
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#endif
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