forked from Minki/linux
0ebb962e00
It seems that an entry for the SP805 watchdog in the table of clocks was missing. This results in the sp805_wdt driver rejecting the device with the following errors: sp805-wdt mb:wdt: Clock not found sp805-wdt mb:wdt: Probe Failed!!! sp805-wdt: probe of mb:wdt failed with error -2 While not obviously stated in the hardware docs, the onboard SP810's "REFCLK" is connected to a 32.768KHz crystal, and this drives the watchdog. Add a struct clk and corresponding lookup entry for it. Signed-off-by: Nick Bowler <nbowler@elliptictech.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
453 lines
10 KiB
C
453 lines
10 KiB
C
/*
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* Versatile Express V2M Motherboard Support
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*/
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#include <linux/device.h>
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#include <linux/amba/bus.h>
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#include <linux/amba/mmci.h>
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#include <linux/io.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/ata_platform.h>
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#include <linux/smsc911x.h>
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#include <linux/spinlock.h>
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#include <linux/sysdev.h>
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#include <linux/usb/isp1760.h>
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#include <linux/clkdev.h>
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#include <linux/mtd/physmap.h>
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#include <asm/mach-types.h>
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#include <asm/sizes.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/time.h>
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#include <asm/hardware/arm_timer.h>
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#include <asm/hardware/timer-sp.h>
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#include <asm/hardware/sp810.h>
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#include <mach/ct-ca9x4.h>
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#include <mach/motherboard.h>
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#include <plat/sched_clock.h>
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#include "core.h"
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#define V2M_PA_CS0 0x40000000
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#define V2M_PA_CS1 0x44000000
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#define V2M_PA_CS2 0x48000000
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#define V2M_PA_CS3 0x4c000000
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#define V2M_PA_CS7 0x10000000
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static struct map_desc v2m_io_desc[] __initdata = {
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{
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.virtual = __MMIO_P2V(V2M_PA_CS7),
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.pfn = __phys_to_pfn(V2M_PA_CS7),
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.length = SZ_128K,
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.type = MT_DEVICE,
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},
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};
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static void __init v2m_timer_init(void)
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{
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u32 scctrl;
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/* Select 1MHz TIMCLK as the reference clock for SP804 timers */
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scctrl = readl(MMIO_P2V(V2M_SYSCTL + SCCTRL));
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scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK;
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scctrl |= SCCTRL_TIMEREN1SEL_TIMCLK;
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writel(scctrl, MMIO_P2V(V2M_SYSCTL + SCCTRL));
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writel(0, MMIO_P2V(V2M_TIMER0) + TIMER_CTRL);
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writel(0, MMIO_P2V(V2M_TIMER1) + TIMER_CTRL);
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sp804_clocksource_init(MMIO_P2V(V2M_TIMER1), "v2m-timer1");
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sp804_clockevents_init(MMIO_P2V(V2M_TIMER0), IRQ_V2M_TIMER0,
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"v2m-timer0");
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}
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static struct sys_timer v2m_timer = {
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.init = v2m_timer_init,
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};
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static DEFINE_SPINLOCK(v2m_cfg_lock);
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int v2m_cfg_write(u32 devfn, u32 data)
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{
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/* Configuration interface broken? */
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u32 val;
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printk("%s: writing %08x to %08x\n", __func__, data, devfn);
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devfn |= SYS_CFG_START | SYS_CFG_WRITE;
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spin_lock(&v2m_cfg_lock);
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val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
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writel(val & ~SYS_CFG_COMPLETE, MMIO_P2V(V2M_SYS_CFGSTAT));
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writel(data, MMIO_P2V(V2M_SYS_CFGDATA));
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writel(devfn, MMIO_P2V(V2M_SYS_CFGCTRL));
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do {
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val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
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} while (val == 0);
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spin_unlock(&v2m_cfg_lock);
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return !!(val & SYS_CFG_ERR);
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}
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int v2m_cfg_read(u32 devfn, u32 *data)
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{
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u32 val;
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devfn |= SYS_CFG_START;
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spin_lock(&v2m_cfg_lock);
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writel(0, MMIO_P2V(V2M_SYS_CFGSTAT));
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writel(devfn, MMIO_P2V(V2M_SYS_CFGCTRL));
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mb();
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do {
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cpu_relax();
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val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
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} while (val == 0);
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*data = readl(MMIO_P2V(V2M_SYS_CFGDATA));
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spin_unlock(&v2m_cfg_lock);
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return !!(val & SYS_CFG_ERR);
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}
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static struct resource v2m_pcie_i2c_resource = {
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.start = V2M_SERIAL_BUS_PCI,
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.end = V2M_SERIAL_BUS_PCI + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device v2m_pcie_i2c_device = {
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.name = "versatile-i2c",
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.id = 0,
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.num_resources = 1,
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.resource = &v2m_pcie_i2c_resource,
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};
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static struct resource v2m_ddc_i2c_resource = {
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.start = V2M_SERIAL_BUS_DVI,
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.end = V2M_SERIAL_BUS_DVI + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device v2m_ddc_i2c_device = {
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.name = "versatile-i2c",
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.id = 1,
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.num_resources = 1,
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.resource = &v2m_ddc_i2c_resource,
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};
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static struct resource v2m_eth_resources[] = {
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{
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.start = V2M_LAN9118,
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.end = V2M_LAN9118 + SZ_64K - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_V2M_LAN9118,
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.end = IRQ_V2M_LAN9118,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct smsc911x_platform_config v2m_eth_config = {
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.flags = SMSC911X_USE_32BIT,
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.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
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.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
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.phy_interface = PHY_INTERFACE_MODE_MII,
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};
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static struct platform_device v2m_eth_device = {
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.name = "smsc911x",
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.id = -1,
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.resource = v2m_eth_resources,
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.num_resources = ARRAY_SIZE(v2m_eth_resources),
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.dev.platform_data = &v2m_eth_config,
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};
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static struct resource v2m_usb_resources[] = {
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{
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.start = V2M_ISP1761,
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.end = V2M_ISP1761 + SZ_128K - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_V2M_ISP1761,
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.end = IRQ_V2M_ISP1761,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct isp1760_platform_data v2m_usb_config = {
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.is_isp1761 = true,
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.bus_width_16 = false,
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.port1_otg = true,
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.analog_oc = false,
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.dack_polarity_high = false,
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.dreq_polarity_high = false,
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};
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static struct platform_device v2m_usb_device = {
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.name = "isp1760",
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.id = -1,
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.resource = v2m_usb_resources,
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.num_resources = ARRAY_SIZE(v2m_usb_resources),
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.dev.platform_data = &v2m_usb_config,
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};
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static void v2m_flash_set_vpp(struct platform_device *pdev, int on)
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{
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writel(on != 0, MMIO_P2V(V2M_SYS_FLASH));
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}
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static struct physmap_flash_data v2m_flash_data = {
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.width = 4,
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.set_vpp = v2m_flash_set_vpp,
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};
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static struct resource v2m_flash_resources[] = {
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{
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.start = V2M_NOR0,
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.end = V2M_NOR0 + SZ_64M - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = V2M_NOR1,
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.end = V2M_NOR1 + SZ_64M - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device v2m_flash_device = {
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.name = "physmap-flash",
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.id = -1,
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.resource = v2m_flash_resources,
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.num_resources = ARRAY_SIZE(v2m_flash_resources),
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.dev.platform_data = &v2m_flash_data,
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};
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static struct pata_platform_info v2m_pata_data = {
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.ioport_shift = 2,
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};
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static struct resource v2m_pata_resources[] = {
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{
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.start = V2M_CF,
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.end = V2M_CF + 0xff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = V2M_CF + 0x100,
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.end = V2M_CF + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device v2m_cf_device = {
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.name = "pata_platform",
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.id = -1,
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.resource = v2m_pata_resources,
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.num_resources = ARRAY_SIZE(v2m_pata_resources),
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.dev.platform_data = &v2m_pata_data,
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};
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static unsigned int v2m_mmci_status(struct device *dev)
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{
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return readl(MMIO_P2V(V2M_SYS_MCI)) & (1 << 0);
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}
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static struct mmci_platform_data v2m_mmci_data = {
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.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
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.status = v2m_mmci_status,
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};
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static AMBA_DEVICE(aaci, "mb:aaci", V2M_AACI, NULL);
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static AMBA_DEVICE(mmci, "mb:mmci", V2M_MMCI, &v2m_mmci_data);
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static AMBA_DEVICE(kmi0, "mb:kmi0", V2M_KMI0, NULL);
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static AMBA_DEVICE(kmi1, "mb:kmi1", V2M_KMI1, NULL);
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static AMBA_DEVICE(uart0, "mb:uart0", V2M_UART0, NULL);
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static AMBA_DEVICE(uart1, "mb:uart1", V2M_UART1, NULL);
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static AMBA_DEVICE(uart2, "mb:uart2", V2M_UART2, NULL);
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static AMBA_DEVICE(uart3, "mb:uart3", V2M_UART3, NULL);
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static AMBA_DEVICE(wdt, "mb:wdt", V2M_WDT, NULL);
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static AMBA_DEVICE(rtc, "mb:rtc", V2M_RTC, NULL);
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static struct amba_device *v2m_amba_devs[] __initdata = {
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&aaci_device,
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&mmci_device,
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&kmi0_device,
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&kmi1_device,
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&uart0_device,
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&uart1_device,
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&uart2_device,
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&uart3_device,
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&wdt_device,
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&rtc_device,
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};
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static long v2m_osc_round(struct clk *clk, unsigned long rate)
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{
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return rate;
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}
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static int v2m_osc1_set(struct clk *clk, unsigned long rate)
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{
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return v2m_cfg_write(SYS_CFG_OSC | SYS_CFG_SITE_MB | 1, rate);
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}
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static const struct clk_ops osc1_clk_ops = {
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.round = v2m_osc_round,
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.set = v2m_osc1_set,
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};
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static struct clk osc1_clk = {
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.ops = &osc1_clk_ops,
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.rate = 24000000,
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};
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static struct clk osc2_clk = {
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.rate = 24000000,
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};
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static struct clk v2m_sp804_clk = {
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.rate = 1000000,
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};
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static struct clk v2m_ref_clk = {
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.rate = 32768,
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};
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static struct clk dummy_apb_pclk;
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static struct clk_lookup v2m_lookups[] = {
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{ /* AMBA bus clock */
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.con_id = "apb_pclk",
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.clk = &dummy_apb_pclk,
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}, { /* UART0 */
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.dev_id = "mb:uart0",
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.clk = &osc2_clk,
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}, { /* UART1 */
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.dev_id = "mb:uart1",
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.clk = &osc2_clk,
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}, { /* UART2 */
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.dev_id = "mb:uart2",
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.clk = &osc2_clk,
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}, { /* UART3 */
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.dev_id = "mb:uart3",
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.clk = &osc2_clk,
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}, { /* KMI0 */
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.dev_id = "mb:kmi0",
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.clk = &osc2_clk,
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}, { /* KMI1 */
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.dev_id = "mb:kmi1",
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.clk = &osc2_clk,
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}, { /* MMC0 */
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.dev_id = "mb:mmci",
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.clk = &osc2_clk,
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}, { /* CLCD */
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.dev_id = "mb:clcd",
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.clk = &osc1_clk,
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}, { /* SP805 WDT */
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.dev_id = "mb:wdt",
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.clk = &v2m_ref_clk,
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}, { /* SP804 timers */
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.dev_id = "sp804",
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.con_id = "v2m-timer0",
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.clk = &v2m_sp804_clk,
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}, { /* SP804 timers */
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.dev_id = "sp804",
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.con_id = "v2m-timer1",
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.clk = &v2m_sp804_clk,
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},
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};
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static void __init v2m_init_early(void)
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{
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ct_desc->init_early();
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clkdev_add_table(v2m_lookups, ARRAY_SIZE(v2m_lookups));
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versatile_sched_clock_init(MMIO_P2V(V2M_SYS_24MHZ), 24000000);
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}
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static void v2m_power_off(void)
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{
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if (v2m_cfg_write(SYS_CFG_SHUTDOWN | SYS_CFG_SITE_MB, 0))
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printk(KERN_EMERG "Unable to shutdown\n");
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}
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static void v2m_restart(char str, const char *cmd)
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{
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if (v2m_cfg_write(SYS_CFG_REBOOT | SYS_CFG_SITE_MB, 0))
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printk(KERN_EMERG "Unable to reboot\n");
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}
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struct ct_desc *ct_desc;
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static struct ct_desc *ct_descs[] __initdata = {
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#ifdef CONFIG_ARCH_VEXPRESS_CA9X4
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&ct_ca9x4_desc,
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#endif
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};
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static void __init v2m_populate_ct_desc(void)
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{
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int i;
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u32 current_tile_id;
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ct_desc = NULL;
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current_tile_id = readl(MMIO_P2V(V2M_SYS_PROCID0)) & V2M_CT_ID_MASK;
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for (i = 0; i < ARRAY_SIZE(ct_descs) && !ct_desc; ++i)
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if (ct_descs[i]->id == current_tile_id)
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ct_desc = ct_descs[i];
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if (!ct_desc)
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panic("vexpress: failed to populate core tile description "
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"for tile ID 0x%8x\n", current_tile_id);
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}
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static void __init v2m_map_io(void)
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{
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iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
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v2m_populate_ct_desc();
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ct_desc->map_io();
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}
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static void __init v2m_init_irq(void)
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{
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ct_desc->init_irq();
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}
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static void __init v2m_init(void)
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{
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int i;
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platform_device_register(&v2m_pcie_i2c_device);
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platform_device_register(&v2m_ddc_i2c_device);
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platform_device_register(&v2m_flash_device);
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platform_device_register(&v2m_cf_device);
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platform_device_register(&v2m_eth_device);
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platform_device_register(&v2m_usb_device);
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for (i = 0; i < ARRAY_SIZE(v2m_amba_devs); i++)
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amba_device_register(v2m_amba_devs[i], &iomem_resource);
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pm_power_off = v2m_power_off;
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arm_pm_restart = v2m_restart;
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ct_desc->init_tile();
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}
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MACHINE_START(VEXPRESS, "ARM-Versatile Express")
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.boot_params = PLAT_PHYS_OFFSET + 0x00000100,
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.map_io = v2m_map_io,
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.init_early = v2m_init_early,
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.init_irq = v2m_init_irq,
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.timer = &v2m_timer,
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.init_machine = v2m_init,
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MACHINE_END
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