forked from Minki/linux
1a32a938b6
There is a difference between the panel/bridge requested pixel clock value and the real one due to the hw platform clock preciseness (pll, dividers...). This patch updates the adjusted_mode clock value with the real hw clock value so then attached encoder & connector can use it for precise timing computations. Signed-off-by: Philippe Cornu <philippe.cornu@st.com> Reviewed-by: Yannick Fertré <yannick.fertre@st.com> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20180125160101.9102-1-philippe.cornu@st.com |
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drv.c | ||
dw_mipi_dsi-stm.c | ||
Kconfig | ||
ltdc.c | ||
ltdc.h | ||
Makefile |