Mika Kuoppala 17f10fdc01 drm/i915/ringbuffer: exclude last 2 cachelines on 845g on all callpaths ... Make intel_render_ring_init_dri and intel_init_ring_buffer symmetrical with regards of workaround introduced by: commit 27c1cbd06a Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Mon Apr 9 13:59:46 2012 +0100 drm/i915/ringbuffer: Exclude last 2 cachlines of ring on 845g Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>		2012-11-11 23:51:09 +01:00
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drm	drm/i915/ringbuffer: exclude last 2 cachelines on 845g on all callpaths	2012-11-11 23:51:09 +01:00
stub	i915: select VIDEO_OUTPUT_CONTROL for ACPI_VIDEO	2011-04-13 09:10:25 +10:00
vga	Merge branch 'pci/yinghai-misc' into next	2012-09-24 17:24:11 -06:00
Makefile