forked from Minki/linux
17afa716e6
Put two extra configs into the device tree to handle the default configuration of the display reset signals on the HREFv60plus, move this over from the board file to the device tree. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
398 lines
13 KiB
C
398 lines
13 KiB
C
/*
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* Copyright (C) ST-Ericsson SA 2010
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*
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* License terms: GNU General Public License (GPL) version 2
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/bug.h>
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#include <linux/string.h>
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#include <linux/pinctrl/machine.h>
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#include <linux/pinctrl/pinconf-generic.h>
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#include <linux/platform_data/pinctrl-nomadik.h>
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#include <asm/mach-types.h>
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#include "board-mop500.h"
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/* These simply sets bias for pins */
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#define BIAS(a,b) static unsigned long a[] = { b }
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BIAS(pd, PIN_PULL_DOWN);
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BIAS(abx500_out_lo, PIN_CONF_PACKED(PIN_CONFIG_OUTPUT, 0));
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BIAS(abx500_in_pd, PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_DOWN, 1));
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BIAS(abx500_in_nopull, PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_DOWN, 0));
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/* These also force them into GPIO mode */
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BIAS(gpio_in_pu, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED);
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BIAS(gpio_in_pd, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED);
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BIAS(gpio_out_hi, PIN_OUTPUT_HIGH|PIN_GPIOMODE_ENABLED);
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BIAS(gpio_out_lo, PIN_OUTPUT_LOW|PIN_GPIOMODE_ENABLED);
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/* We use these to define hog settings that are always done on boot */
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#define DB8500_MUX_HOG(group,func) \
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PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-db8500", group, func)
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#define DB8500_PIN_HOG(pin,conf) \
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PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-db8500", pin, conf)
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/* These are default states associated with device and changed runtime */
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#define DB8500_MUX(group,func,dev) \
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PIN_MAP_MUX_GROUP_DEFAULT(dev, "pinctrl-db8500", group, func)
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#define DB8500_PIN(pin,conf,dev) \
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PIN_MAP_CONFIGS_PIN_DEFAULT(dev, "pinctrl-db8500", pin, conf)
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#define DB8500_PIN_IDLE(pin, conf, dev) \
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PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_IDLE, "pinctrl-db8500", \
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pin, conf)
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#define DB8500_PIN_SLEEP(pin, conf, dev) \
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PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \
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pin, conf)
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#define DB8500_MUX_STATE(group, func, dev, state) \
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PIN_MAP_MUX_GROUP(dev, state, "pinctrl-db8500", group, func)
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#define DB8500_PIN_STATE(pin, conf, dev, state) \
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PIN_MAP_CONFIGS_PIN(dev, state, "pinctrl-db8500", pin, conf)
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#define AB8500_MUX_HOG(group, func) \
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PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-ab8500.0", group, func)
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#define AB8500_PIN_HOG(pin, conf) \
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PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-ab8500.0", pin, abx500_##conf)
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#define AB8500_MUX_STATE(group, func, dev, state) \
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PIN_MAP_MUX_GROUP(dev, state, "pinctrl-ab8500.0", group, func)
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#define AB8500_PIN_STATE(pin, conf, dev, state) \
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PIN_MAP_CONFIGS_PIN(dev, state, "pinctrl-ab8500.0", pin, abx500_##conf)
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#define AB8505_MUX_HOG(group, func) \
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PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-ab8505.0", group, func)
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#define AB8505_PIN_HOG(pin, conf) \
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PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-ab8505.0", pin, abx500_##conf)
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#define AB8505_MUX_STATE(group, func, dev, state) \
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PIN_MAP_MUX_GROUP(dev, state, "pinctrl-ab8505.0", group, func)
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#define AB8505_PIN_STATE(pin, conf, dev, state) \
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PIN_MAP_CONFIGS_PIN(dev, state, "pinctrl-ab8505.0", pin, abx500_##conf)
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static struct pinctrl_map __initdata ab8500_pinmap[] = {
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/* Sysclkreq2 */
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AB8500_MUX_STATE("sysclkreq2_d_1", "sysclkreq", "regulator.35", PINCTRL_STATE_DEFAULT),
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AB8500_PIN_STATE("GPIO1_T10", in_nopull, "regulator.35", PINCTRL_STATE_DEFAULT),
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/* sysclkreq2 disable, mux in gpio configured in input pulldown */
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AB8500_MUX_STATE("gpio1_a_1", "gpio", "regulator.35", PINCTRL_STATE_SLEEP),
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AB8500_PIN_STATE("GPIO1_T10", in_pd, "regulator.35", PINCTRL_STATE_SLEEP),
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/* pins 2 is muxed in GPIO, configured in INPUT PULL DOWN */
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AB8500_MUX_HOG("gpio2_a_1", "gpio"),
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AB8500_PIN_HOG("GPIO2_T9", in_pd),
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/* Sysclkreq4 */
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AB8500_MUX_STATE("sysclkreq4_d_1", "sysclkreq", "regulator.36", PINCTRL_STATE_DEFAULT),
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AB8500_PIN_STATE("GPIO3_U9", in_nopull, "regulator.36", PINCTRL_STATE_DEFAULT),
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/* sysclkreq4 disable, mux in gpio configured in input pulldown */
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AB8500_MUX_STATE("gpio3_a_1", "gpio", "regulator.36", PINCTRL_STATE_SLEEP),
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AB8500_PIN_STATE("GPIO3_U9", in_pd, "regulator.36", PINCTRL_STATE_SLEEP),
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/* pins 4 is muxed in GPIO, configured in INPUT PULL DOWN */
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AB8500_MUX_HOG("gpio4_a_1", "gpio"),
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AB8500_PIN_HOG("GPIO4_W2", in_pd),
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/*
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* pins 6,7,8 and 9 are muxed in YCBCR0123
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* configured in INPUT PULL UP
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*/
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AB8500_MUX_HOG("ycbcr0123_d_1", "ycbcr"),
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AB8500_PIN_HOG("GPIO6_Y18", in_nopull),
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AB8500_PIN_HOG("GPIO7_AA20", in_nopull),
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AB8500_PIN_HOG("GPIO8_W18", in_nopull),
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AB8500_PIN_HOG("GPIO9_AA19", in_nopull),
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/*
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* pins 10,11,12 and 13 are muxed in GPIO
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* configured in INPUT PULL DOWN
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*/
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AB8500_MUX_HOG("gpio10_d_1", "gpio"),
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AB8500_PIN_HOG("GPIO10_U17", in_pd),
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AB8500_MUX_HOG("gpio11_d_1", "gpio"),
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AB8500_PIN_HOG("GPIO11_AA18", in_pd),
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AB8500_MUX_HOG("gpio12_d_1", "gpio"),
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AB8500_PIN_HOG("GPIO12_U16", in_pd),
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AB8500_MUX_HOG("gpio13_d_1", "gpio"),
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AB8500_PIN_HOG("GPIO13_W17", in_pd),
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/*
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* pins 14,15 are muxed in PWM1 and PWM2
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* configured in INPUT PULL DOWN
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*/
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AB8500_MUX_HOG("pwmout1_d_1", "pwmout"),
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AB8500_PIN_HOG("GPIO14_F14", in_pd),
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AB8500_MUX_HOG("pwmout2_d_1", "pwmout"),
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AB8500_PIN_HOG("GPIO15_B17", in_pd),
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/*
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* pins 16 is muxed in GPIO
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* configured in INPUT PULL DOWN
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*/
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AB8500_MUX_HOG("gpio16_a_1", "gpio"),
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AB8500_PIN_HOG("GPIO14_F14", in_pd),
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/*
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* pins 17,18,19 and 20 are muxed in AUDIO interface 1
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* configured in INPUT PULL DOWN
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*/
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AB8500_MUX_HOG("adi1_d_1", "adi1"),
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AB8500_PIN_HOG("GPIO17_P5", in_pd),
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AB8500_PIN_HOG("GPIO18_R5", in_pd),
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AB8500_PIN_HOG("GPIO19_U5", in_pd),
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AB8500_PIN_HOG("GPIO20_T5", in_pd),
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/*
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* pins 21,22 and 23 are muxed in USB UICC
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* configured in INPUT PULL DOWN
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*/
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AB8500_MUX_HOG("usbuicc_d_1", "usbuicc"),
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AB8500_PIN_HOG("GPIO21_H19", in_pd),
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AB8500_PIN_HOG("GPIO22_G20", in_pd),
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AB8500_PIN_HOG("GPIO23_G19", in_pd),
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/*
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* pins 24,25 are muxed in GPIO
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* configured in INPUT PULL DOWN
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*/
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AB8500_MUX_HOG("gpio24_a_1", "gpio"),
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AB8500_PIN_HOG("GPIO24_T14", in_pd),
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AB8500_MUX_HOG("gpio25_a_1", "gpio"),
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AB8500_PIN_HOG("GPIO25_R16", in_pd),
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/*
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* pins 26 is muxed in GPIO
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* configured in OUTPUT LOW
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*/
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AB8500_MUX_HOG("gpio26_d_1", "gpio"),
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AB8500_PIN_HOG("GPIO26_M16", out_lo),
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/*
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* pins 27,28 are muxed in DMIC12
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* configured in INPUT PULL DOWN
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*/
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AB8500_MUX_HOG("dmic12_d_1", "dmic"),
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AB8500_PIN_HOG("GPIO27_J6", in_pd),
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AB8500_PIN_HOG("GPIO28_K6", in_pd),
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/*
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* pins 29,30 are muxed in DMIC34
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* configured in INPUT PULL DOWN
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*/
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AB8500_MUX_HOG("dmic34_d_1", "dmic"),
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AB8500_PIN_HOG("GPIO29_G6", in_pd),
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AB8500_PIN_HOG("GPIO30_H6", in_pd),
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/*
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* pins 31,32 are muxed in DMIC56
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* configured in INPUT PULL DOWN
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*/
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AB8500_MUX_HOG("dmic56_d_1", "dmic"),
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AB8500_PIN_HOG("GPIO31_F5", in_pd),
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AB8500_PIN_HOG("GPIO32_G5", in_pd),
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/*
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* pins 34 is muxed in EXTCPENA
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* configured INPUT PULL DOWN
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*/
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AB8500_MUX_HOG("extcpena_d_1", "extcpena"),
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AB8500_PIN_HOG("GPIO34_R17", in_pd),
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/*
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* pins 35 is muxed in GPIO
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* configured in OUTPUT LOW
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*/
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AB8500_MUX_HOG("gpio35_d_1", "gpio"),
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AB8500_PIN_HOG("GPIO35_W15", in_pd),
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/*
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* pins 36,37,38 and 39 are muxed in GPIO
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* configured in INPUT PULL DOWN
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*/
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AB8500_MUX_HOG("gpio36_a_1", "gpio"),
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AB8500_PIN_HOG("GPIO36_A17", in_pd),
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AB8500_MUX_HOG("gpio37_a_1", "gpio"),
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AB8500_PIN_HOG("GPIO37_E15", in_pd),
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AB8500_MUX_HOG("gpio38_a_1", "gpio"),
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AB8500_PIN_HOG("GPIO38_C17", in_pd),
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AB8500_MUX_HOG("gpio39_a_1", "gpio"),
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AB8500_PIN_HOG("GPIO39_E16", in_pd),
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/*
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* pins 40 and 41 are muxed in MODCSLSDA
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* configured INPUT PULL DOWN
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*/
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AB8500_MUX_HOG("modsclsda_d_1", "modsclsda"),
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AB8500_PIN_HOG("GPIO40_T19", in_pd),
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AB8500_PIN_HOG("GPIO41_U19", in_pd),
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/*
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* pins 42 is muxed in GPIO
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* configured INPUT PULL DOWN
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*/
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AB8500_MUX_HOG("gpio42_a_1", "gpio"),
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AB8500_PIN_HOG("GPIO42_U2", in_pd),
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};
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static struct pinctrl_map __initdata ab8505_pinmap[] = {
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/* Sysclkreq2 */
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AB8505_MUX_STATE("sysclkreq2_d_1", "sysclkreq", "regulator.36", PINCTRL_STATE_DEFAULT),
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AB8505_PIN_STATE("GPIO1_N4", in_nopull, "regulator.36", PINCTRL_STATE_DEFAULT),
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/* sysclkreq2 disable, mux in gpio configured in input pulldown */
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AB8505_MUX_STATE("gpio1_a_1", "gpio", "regulator.36", PINCTRL_STATE_SLEEP),
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AB8505_PIN_STATE("GPIO1_N4", in_pd, "regulator.36", PINCTRL_STATE_SLEEP),
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/* pins 2 is muxed in GPIO, configured in INPUT PULL DOWN */
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AB8505_MUX_HOG("gpio2_a_1", "gpio"),
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AB8505_PIN_HOG("GPIO2_R5", in_pd),
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/* Sysclkreq4 */
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AB8505_MUX_STATE("sysclkreq4_d_1", "sysclkreq", "regulator.37", PINCTRL_STATE_DEFAULT),
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AB8505_PIN_STATE("GPIO3_P5", in_nopull, "regulator.37", PINCTRL_STATE_DEFAULT),
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/* sysclkreq4 disable, mux in gpio configured in input pulldown */
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AB8505_MUX_STATE("gpio3_a_1", "gpio", "regulator.37", PINCTRL_STATE_SLEEP),
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AB8505_PIN_STATE("GPIO3_P5", in_pd, "regulator.37", PINCTRL_STATE_SLEEP),
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AB8505_MUX_HOG("gpio10_d_1", "gpio"),
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AB8505_PIN_HOG("GPIO10_B16", in_pd),
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AB8505_MUX_HOG("gpio11_d_1", "gpio"),
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AB8505_PIN_HOG("GPIO11_B17", in_pd),
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AB8505_MUX_HOG("gpio13_d_1", "gpio"),
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AB8505_PIN_HOG("GPIO13_D17", in_nopull),
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AB8505_MUX_HOG("pwmout1_d_1", "pwmout"),
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AB8505_PIN_HOG("GPIO14_C16", in_pd),
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AB8505_MUX_HOG("adi2_d_1", "adi2"),
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AB8505_PIN_HOG("GPIO17_P2", in_pd),
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AB8505_PIN_HOG("GPIO18_N3", in_pd),
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AB8505_PIN_HOG("GPIO19_T1", in_pd),
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AB8505_PIN_HOG("GPIO20_P3", in_pd),
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AB8505_MUX_HOG("gpio34_a_1", "gpio"),
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AB8505_PIN_HOG("GPIO34_H14", in_pd),
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AB8505_MUX_HOG("modsclsda_d_1", "modsclsda"),
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AB8505_PIN_HOG("GPIO40_J15", in_pd),
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AB8505_PIN_HOG("GPIO41_J14", in_pd),
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AB8505_MUX_HOG("gpio50_d_1", "gpio"),
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AB8505_PIN_HOG("GPIO50_L4", in_nopull),
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AB8505_MUX_HOG("resethw_d_1", "resethw"),
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AB8505_PIN_HOG("GPIO52_D16", in_pd),
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AB8505_MUX_HOG("service_d_1", "service"),
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AB8505_PIN_HOG("GPIO53_D15", in_pd),
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};
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/*
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* The HREFv60 series of platforms is using available pins on the DB8500
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* insteaf of the Toshiba I2C GPIO expander, reusing some pins like the SSP0
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* and SSP1 ports (previously connected to the AB8500) as generic GPIO lines.
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*/
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static struct pinctrl_map __initdata hrefv60_pinmap[] = {
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/* Magnetometer uses GPIO 31 and 32, pull these up/down respectively */
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DB8500_PIN_HOG("GPIO31_V3", gpio_in_pu), /* EN1 */
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DB8500_PIN_HOG("GPIO32_V2", gpio_in_pd), /* DRDY */
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/*
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* Touch screen uses GPIO 143 for RST1, GPIO 146 for RST2 and
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* GPIO 67 for interrupts. Pull-up the IRQ line and drive both
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* reset signals low.
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*/
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DB8500_PIN_HOG("GPIO143_D12", gpio_out_lo), /* TOUCH_RST1 */
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DB8500_PIN_HOG("GPIO67_G2", gpio_in_pu), /* TOUCH_INT2 */
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DB8500_PIN_HOG("GPIO146_D13", gpio_out_lo), /* TOUCH_RST2 */
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/*
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* Drive D19-D23 for the ETM PTM trace interface low,
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* (presumably pins are unconnected therefore grounded here,
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* the "other alt C1" setting enables these pins)
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*/
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DB8500_PIN_HOG("GPIO70_G5", gpio_out_lo),
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DB8500_PIN_HOG("GPIO71_G4", gpio_out_lo),
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DB8500_PIN_HOG("GPIO72_H4", gpio_out_lo),
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DB8500_PIN_HOG("GPIO73_H3", gpio_out_lo),
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DB8500_PIN_HOG("GPIO74_J3", gpio_out_lo),
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/* NAHJ CTRL on GPIO 76 to low, CTRL_INV on GPIO216 to high */
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DB8500_PIN_HOG("GPIO76_J2", gpio_out_lo), /* CTRL */
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DB8500_PIN_HOG("GPIO216_AG12", gpio_out_hi), /* CTRL_INV */
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/* NFC ENA and RESET to low, pulldown IRQ line */
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DB8500_PIN_HOG("GPIO77_H1", gpio_out_lo), /* NFC_ENA */
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DB8500_PIN_HOG("GPIO144_B13", gpio_in_pd), /* NFC_IRQ */
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DB8500_PIN_HOG("GPIO142_C11", gpio_out_lo), /* NFC_RESET */
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DB8500_PIN_HOG("GPIO91_B6", gpio_in_pu), /* FORCE_SENSING_INT */
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DB8500_PIN_HOG("GPIO92_D6", gpio_out_lo), /* FORCE_SENSING_RST */
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DB8500_PIN_HOG("GPIO97_D9", gpio_out_lo), /* FORCE_SENSING_WU */
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/* DiPro Sensor interrupt */
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DB8500_PIN_HOG("GPIO139_C9", gpio_in_pu), /* DIPRO_INT */
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/* Audio Amplifier HF enable */
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DB8500_PIN_HOG("GPIO149_B14", gpio_out_hi), /* VAUDIO_HF_EN, enable MAX8968 */
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/* GBF interface, pull low to reset state */
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DB8500_PIN_HOG("GPIO171_D23", gpio_out_lo), /* GBF_ENA_RESET */
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/* MSP : HDTV INTERFACE GPIO line */
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DB8500_PIN_HOG("GPIO192_AJ27", gpio_in_pd),
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/* Accelerometer interrupt lines */
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DB8500_PIN_HOG("GPIO82_C1", gpio_in_pu), /* ACC_INT1 */
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DB8500_PIN_HOG("GPIO83_D3", gpio_in_pu), /* ACC_INT2 */
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};
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static struct pinctrl_map __initdata snowball_pinmap[] = {
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/* Mux in SSP0 connected to AB8500, pull down RXD pin */
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DB8500_MUX_HOG("ssp0_a_1", "ssp0"),
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DB8500_PIN_HOG("GPIO145_C13", pd),
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/* Mux in "SM" which is used for the SMSC911x Ethernet adapter */
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DB8500_MUX_HOG("sm_b_1", "sm"),
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/* User LED */
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DB8500_PIN_HOG("GPIO142_C11", gpio_out_hi),
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/* Drive RSTn_LAN high */
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DB8500_PIN_HOG("GPIO141_C12", gpio_out_hi),
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/* Accelerometer/Magnetometer */
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DB8500_PIN_HOG("GPIO163_C20", gpio_in_pu), /* ACCEL_IRQ1 */
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DB8500_PIN_HOG("GPIO164_B21", gpio_in_pu), /* ACCEL_IRQ2 */
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DB8500_PIN_HOG("GPIO165_C21", gpio_in_pu), /* MAG_DRDY */
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/* WLAN/GBF */
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|
DB8500_PIN_HOG("GPIO161_D21", gpio_out_lo), /* WLAN_PMU_EN */
|
|
DB8500_PIN_HOG("GPIO171_D23", gpio_out_hi), /* GBF_ENA */
|
|
DB8500_PIN_HOG("GPIO215_AH13", gpio_out_lo), /* WLAN_ENA */
|
|
DB8500_PIN_HOG("GPIO216_AG12", gpio_in_pu), /* WLAN_IRQ */
|
|
};
|
|
|
|
void __init mop500_pinmaps_init(void)
|
|
{
|
|
if (machine_is_u8520())
|
|
pinctrl_register_mappings(ab8505_pinmap,
|
|
ARRAY_SIZE(ab8505_pinmap));
|
|
else
|
|
pinctrl_register_mappings(ab8500_pinmap,
|
|
ARRAY_SIZE(ab8500_pinmap));
|
|
}
|
|
|
|
void __init snowball_pinmaps_init(void)
|
|
{
|
|
pinctrl_register_mappings(snowball_pinmap,
|
|
ARRAY_SIZE(snowball_pinmap));
|
|
pinctrl_register_mappings(ab8500_pinmap,
|
|
ARRAY_SIZE(ab8500_pinmap));
|
|
}
|
|
|
|
void __init hrefv60_pinmaps_init(void)
|
|
{
|
|
pinctrl_register_mappings(hrefv60_pinmap,
|
|
ARRAY_SIZE(hrefv60_pinmap));
|
|
pinctrl_register_mappings(ab8500_pinmap,
|
|
ARRAY_SIZE(ab8500_pinmap));
|
|
}
|