forked from Minki/linux
aca63b7661
In order to support multiple outputs we need to move the output mode selection to the CRTC object, so that the output validity check can be done against the drm_atomic_state. If the connectors selected by a specific mode setting are requiring incompatible bus format the atomic operation is aborted (->atomic_check() returns -EINVAL). In order to implement that, we need to define our own CRTC state and overload default ->reset(), ->atomic_duplicate_state() and ->atomic_destroy_state() functions. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Nicolas Ferre <nicolas.ferre@atmel.com>
177 lines
5.0 KiB
C
177 lines
5.0 KiB
C
/*
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* Copyright (C) 2014 Traphandler
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* Copyright (C) 2014 Free Electrons
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* Copyright (C) 2014 Atmel
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*
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* Author: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
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* Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef DRM_ATMEL_HLCDC_H
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#define DRM_ATMEL_HLCDC_H
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#include <linux/clk.h>
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#include <linux/irqdomain.h>
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#include <linux/pwm.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_crtc.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_fb_cma_helper.h>
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#include <drm/drm_gem_cma_helper.h>
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#include <drm/drm_panel.h>
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#include <drm/drm_plane_helper.h>
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#include <drm/drmP.h>
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#include "atmel_hlcdc_layer.h"
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#define ATMEL_HLCDC_MAX_LAYERS 5
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/**
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* Atmel HLCDC Display Controller description structure.
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*
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* This structure describe the HLCDC IP capabilities and depends on the
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* HLCDC IP version (or Atmel SoC family).
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*
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* @min_width: minimum width supported by the Display Controller
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* @min_height: minimum height supported by the Display Controller
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* @max_width: maximum width supported by the Display Controller
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* @max_height: maximum height supported by the Display Controller
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* @max_spw: maximum vertical/horizontal pulse width
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* @max_vpw: maximum vertical back/front porch width
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* @max_hpw: maximum horizontal back/front porch width
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* @conflicting_output_formats: true if RGBXXX output formats conflict with
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* each other.
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* @layers: a layer description table describing available layers
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* @nlayers: layer description table size
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*/
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struct atmel_hlcdc_dc_desc {
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int min_width;
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int min_height;
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int max_width;
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int max_height;
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int max_spw;
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int max_vpw;
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int max_hpw;
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bool conflicting_output_formats;
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const struct atmel_hlcdc_layer_desc *layers;
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int nlayers;
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};
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/**
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* Atmel HLCDC Plane properties.
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*
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* This structure stores plane property definitions.
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*
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* @alpha: alpha blending (or transparency) property
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* @rotation: rotation property
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*/
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struct atmel_hlcdc_plane_properties {
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struct drm_property *alpha;
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};
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/**
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* Atmel HLCDC Plane.
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*
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* @base: base DRM plane structure
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* @layer: HLCDC layer structure
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* @properties: pointer to the property definitions structure
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* @rotation: current rotation status
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*/
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struct atmel_hlcdc_plane {
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struct drm_plane base;
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struct atmel_hlcdc_layer layer;
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struct atmel_hlcdc_plane_properties *properties;
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};
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static inline struct atmel_hlcdc_plane *
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drm_plane_to_atmel_hlcdc_plane(struct drm_plane *p)
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{
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return container_of(p, struct atmel_hlcdc_plane, base);
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}
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static inline struct atmel_hlcdc_plane *
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atmel_hlcdc_layer_to_plane(struct atmel_hlcdc_layer *l)
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{
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return container_of(l, struct atmel_hlcdc_plane, layer);
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}
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/**
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* Atmel HLCDC Planes.
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*
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* This structure stores the instantiated HLCDC Planes and can be accessed by
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* the HLCDC Display Controller or the HLCDC CRTC.
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*
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* @primary: primary plane
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* @cursor: hardware cursor plane
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* @overlays: overlay plane table
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* @noverlays: number of overlay planes
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*/
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struct atmel_hlcdc_planes {
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struct atmel_hlcdc_plane *primary;
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struct atmel_hlcdc_plane *cursor;
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struct atmel_hlcdc_plane **overlays;
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int noverlays;
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};
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/**
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* Atmel HLCDC Display Controller.
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*
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* @desc: HLCDC Display Controller description
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* @hlcdc: pointer to the atmel_hlcdc structure provided by the MFD device
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* @fbdev: framebuffer device attached to the Display Controller
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* @crtc: CRTC provided by the display controller
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* @planes: instantiated planes
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* @layers: active HLCDC layer
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* @wq: display controller workqueue
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* @commit: used for async commit handling
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*/
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struct atmel_hlcdc_dc {
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const struct atmel_hlcdc_dc_desc *desc;
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struct atmel_hlcdc *hlcdc;
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struct drm_fbdev_cma *fbdev;
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struct drm_crtc *crtc;
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struct atmel_hlcdc_planes *planes;
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struct atmel_hlcdc_layer *layers[ATMEL_HLCDC_MAX_LAYERS];
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struct workqueue_struct *wq;
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struct {
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wait_queue_head_t wait;
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bool pending;
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} commit;
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};
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extern struct atmel_hlcdc_formats atmel_hlcdc_plane_rgb_formats;
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extern struct atmel_hlcdc_formats atmel_hlcdc_plane_rgb_and_yuv_formats;
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int atmel_hlcdc_dc_mode_valid(struct atmel_hlcdc_dc *dc,
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struct drm_display_mode *mode);
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struct atmel_hlcdc_planes *
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atmel_hlcdc_create_planes(struct drm_device *dev);
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int atmel_hlcdc_plane_prepare_disc_area(struct drm_crtc_state *c_state);
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void atmel_hlcdc_crtc_irq(struct drm_crtc *c);
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void atmel_hlcdc_crtc_suspend(struct drm_crtc *crtc);
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void atmel_hlcdc_crtc_resume(struct drm_crtc *crtc);
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int atmel_hlcdc_crtc_create(struct drm_device *dev);
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int atmel_hlcdc_create_outputs(struct drm_device *dev);
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#endif /* DRM_ATMEL_HLCDC_H */
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