forked from Minki/linux
48f5dd56cf
Old Device Tree for the qi,lb60 (aka. Ben Nanonote) did not have a 'memory' node. The kernel would then read the memory controller registers to know how much RAM was available. Since every other supported board has had a 'memory' node from the beginning, we can just hardcode a RAM size of 32 MiB when running with an old Device Tree without the 'memory' node. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
146 lines
2.9 KiB
C
146 lines
2.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
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* Copyright (C) 2011, Maarten ter Huurne <maarten@treewalker.org>
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* JZ4740 setup code
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*/
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#include <linux/clocksource.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/irqchip.h>
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#include <linux/kernel.h>
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#include <linux/libfdt.h>
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#include <linux/of_clk.h>
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#include <linux/of_fdt.h>
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#include <linux/pm.h>
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#include <linux/sizes.h>
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#include <linux/suspend.h>
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#include <asm/bootinfo.h>
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#include <asm/fw/fw.h>
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#include <asm/prom.h>
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#include <asm/reboot.h>
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#include <asm/time.h>
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static unsigned long __init get_board_mach_type(const void *fdt)
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{
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if (!fdt_node_check_compatible(fdt, 0, "ingenic,x2000"))
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return MACH_INGENIC_X2000;
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if (!fdt_node_check_compatible(fdt, 0, "ingenic,x1830"))
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return MACH_INGENIC_X1830;
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if (!fdt_node_check_compatible(fdt, 0, "ingenic,x1000"))
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return MACH_INGENIC_X1000;
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if (!fdt_node_check_compatible(fdt, 0, "ingenic,jz4780"))
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return MACH_INGENIC_JZ4780;
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if (!fdt_node_check_compatible(fdt, 0, "ingenic,jz4770"))
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return MACH_INGENIC_JZ4770;
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if (!fdt_node_check_compatible(fdt, 0, "ingenic,jz4725b"))
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return MACH_INGENIC_JZ4725B;
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return MACH_INGENIC_JZ4740;
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}
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void __init plat_mem_setup(void)
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{
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void *dtb = (void *)fw_passed_dtb;
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__dt_setup_arch(dtb);
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/*
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* Old devicetree files for the qi,lb60 board did not have a /memory
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* node. Hardcode the memory info here.
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*/
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if (!fdt_node_check_compatible(dtb, 0, "qi,lb60") &&
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fdt_path_offset(dtb, "/memory") < 0)
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early_init_dt_add_memory_arch(0, SZ_32M);
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mips_machtype = get_board_mach_type(dtb);
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}
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void __init device_tree_init(void)
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{
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if (!initial_boot_params)
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return;
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unflatten_and_copy_device_tree();
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}
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const char *get_system_type(void)
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{
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switch (mips_machtype) {
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case MACH_INGENIC_X2000:
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return "X2000";
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case MACH_INGENIC_X1830:
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return "X1830";
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case MACH_INGENIC_X1000:
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return "X1000";
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case MACH_INGENIC_JZ4780:
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return "JZ4780";
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case MACH_INGENIC_JZ4770:
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return "JZ4770";
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case MACH_INGENIC_JZ4725B:
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return "JZ4725B";
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default:
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return "JZ4740";
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}
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}
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void __init arch_init_irq(void)
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{
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irqchip_init();
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}
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void __init plat_time_init(void)
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{
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of_clk_init(NULL);
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timer_probe();
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}
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void __init prom_init(void)
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{
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fw_init_cmdline();
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}
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void __init prom_free_prom_memory(void)
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{
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}
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static void jz4740_wait_instr(void)
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{
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__asm__(".set push;\n"
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".set mips3;\n"
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"wait;\n"
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".set pop;\n"
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);
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}
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static void jz4740_halt(void)
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{
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for (;;)
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jz4740_wait_instr();
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}
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static int __maybe_unused jz4740_pm_enter(suspend_state_t state)
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{
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jz4740_wait_instr();
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return 0;
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}
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static const struct platform_suspend_ops jz4740_pm_ops __maybe_unused = {
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.valid = suspend_valid_only_mem,
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.enter = jz4740_pm_enter,
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};
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static int __init jz4740_pm_init(void)
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{
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if (IS_ENABLED(CONFIG_PM_SLEEP))
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suspend_set_ops(&jz4740_pm_ops);
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_machine_halt = jz4740_halt;
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return 0;
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}
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late_initcall(jz4740_pm_init);
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