forked from Minki/linux
a1ac490d0d
replaced macros:
BNA_MAC_IS_EQUAL -> ether_addr_equal
BNA_POWER_OF_2 -> is_power_of_2
BNA_TO_POWER_OF_2_HIGH -> roundup_pow_of_two
removed unused macros:
bfa_fsm_get_state
bfa_ioc_clr_stats
bfa_ioc_fetch_stats
bfa_ioc_get_alt_ioc_fwstate
bfa_ioc_isr_mode_set
bfa_ioc_maxfrsize
bfa_ioc_mbox_cmd_pending
bfa_ioc_ownership_reset
bfa_ioc_rx_bbcredit
bfa_ioc_state_disabled
bfa_sm_cmp_state
bfa_sm_get_state
bfa_sm_send_event
bfa_sm_set_state
bfa_sm_state_decl
BFA_STRING_32
BFI_ADAPTER_IS_{PROTO,TTV,UNSUPP)
BFI_IOC_ENDIAN_SIG
BNA_{C,RX,TX}Q_PAGE_INDEX_MAX
BNA_{C,RX,TX}Q_PAGE_INDEX_MAX_SHIFT
BNA_{C,RX,TX}Q_QPGE_PTR_GET
BNA_IOC_TIMER_FREQ
BNA_MESSAGE_SIZE
BNA_QE_INDX_2_PTR
BNA_QE_INDX_RANGE
BNA_Q_GET_{C,P}I
BNA_Q_{C,P}I_ADD
BNA_Q_FREE_COUNT
BNA_Q_IN_USE_COUNT
BNA_TO_POWER_OF_2
containing_rec
Signed-off-by: Ivan Vecera <ivecera@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
292 lines
8.2 KiB
C
292 lines
8.2 KiB
C
/*
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* Linux network driver for QLogic BR-series Converged Network Adapter.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License (GPL) Version 2 as
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* published by the Free Software Foundation
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*/
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/*
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* Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
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* Copyright (c) 2014-2015 QLogic Corporation
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* All rights reserved
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* www.qlogic.com
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*/
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#ifndef __BFA_DEFS_H__
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#define __BFA_DEFS_H__
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#include "cna.h"
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#include "bfa_defs_status.h"
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#include "bfa_defs_mfg_comm.h"
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#define BFA_VERSION_LEN 64
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/* ---------------------- adapter definitions ------------ */
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/* BFA adapter level attributes. */
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enum {
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BFA_ADAPTER_SERIAL_NUM_LEN = STRSZ(BFA_MFG_SERIALNUM_SIZE),
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/*
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*!< adapter serial num length
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*/
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BFA_ADAPTER_MODEL_NAME_LEN = 16, /*!< model name length */
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BFA_ADAPTER_MODEL_DESCR_LEN = 128, /*!< model description length */
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BFA_ADAPTER_MFG_NAME_LEN = 8, /*!< manufacturer name length */
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BFA_ADAPTER_SYM_NAME_LEN = 64, /*!< adapter symbolic name length */
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BFA_ADAPTER_OS_TYPE_LEN = 64, /*!< adapter os type length */
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};
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struct bfa_adapter_attr {
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char manufacturer[BFA_ADAPTER_MFG_NAME_LEN];
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char serial_num[BFA_ADAPTER_SERIAL_NUM_LEN];
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u32 card_type;
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char model[BFA_ADAPTER_MODEL_NAME_LEN];
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char model_descr[BFA_ADAPTER_MODEL_DESCR_LEN];
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u64 pwwn;
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char node_symname[FC_SYMNAME_MAX];
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char hw_ver[BFA_VERSION_LEN];
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char fw_ver[BFA_VERSION_LEN];
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char optrom_ver[BFA_VERSION_LEN];
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char os_type[BFA_ADAPTER_OS_TYPE_LEN];
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struct bfa_mfg_vpd vpd;
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u8 mac[ETH_ALEN];
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u8 nports;
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u8 max_speed;
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u8 prototype;
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char asic_rev;
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u8 pcie_gen;
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u8 pcie_lanes_orig;
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u8 pcie_lanes;
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u8 cna_capable;
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u8 is_mezz;
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u8 trunk_capable;
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};
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/* ---------------------- IOC definitions ------------ */
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enum {
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BFA_IOC_DRIVER_LEN = 16,
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BFA_IOC_CHIP_REV_LEN = 8,
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};
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/* Driver and firmware versions. */
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struct bfa_ioc_driver_attr {
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char driver[BFA_IOC_DRIVER_LEN]; /*!< driver name */
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char driver_ver[BFA_VERSION_LEN]; /*!< driver version */
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char fw_ver[BFA_VERSION_LEN]; /*!< firmware version */
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char bios_ver[BFA_VERSION_LEN]; /*!< bios version */
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char efi_ver[BFA_VERSION_LEN]; /*!< EFI version */
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char ob_ver[BFA_VERSION_LEN]; /*!< openboot version */
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};
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/* IOC PCI device attributes */
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struct bfa_ioc_pci_attr {
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u16 vendor_id; /*!< PCI vendor ID */
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u16 device_id; /*!< PCI device ID */
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u16 ssid; /*!< subsystem ID */
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u16 ssvid; /*!< subsystem vendor ID */
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u32 pcifn; /*!< PCI device function */
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u32 rsvd; /* padding */
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char chip_rev[BFA_IOC_CHIP_REV_LEN]; /*!< chip revision */
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};
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/* IOC states */
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enum bfa_ioc_state {
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BFA_IOC_UNINIT = 1, /*!< IOC is in uninit state */
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BFA_IOC_RESET = 2, /*!< IOC is in reset state */
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BFA_IOC_SEMWAIT = 3, /*!< Waiting for IOC h/w semaphore */
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BFA_IOC_HWINIT = 4, /*!< IOC h/w is being initialized */
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BFA_IOC_GETATTR = 5, /*!< IOC is being configured */
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BFA_IOC_OPERATIONAL = 6, /*!< IOC is operational */
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BFA_IOC_INITFAIL = 7, /*!< IOC hardware failure */
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BFA_IOC_FAIL = 8, /*!< IOC heart-beat failure */
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BFA_IOC_DISABLING = 9, /*!< IOC is being disabled */
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BFA_IOC_DISABLED = 10, /*!< IOC is disabled */
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BFA_IOC_FWMISMATCH = 11, /*!< IOC f/w different from drivers */
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BFA_IOC_ENABLING = 12, /*!< IOC is being enabled */
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BFA_IOC_HWFAIL = 13, /*!< PCI mapping doesn't exist */
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};
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/* IOC firmware stats */
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struct bfa_fw_ioc_stats {
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u32 enable_reqs;
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u32 disable_reqs;
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u32 get_attr_reqs;
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u32 dbg_sync;
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u32 dbg_dump;
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u32 unknown_reqs;
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};
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/* IOC driver stats */
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struct bfa_ioc_drv_stats {
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u32 ioc_isrs;
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u32 ioc_enables;
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u32 ioc_disables;
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u32 ioc_hbfails;
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u32 ioc_boots;
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u32 stats_tmos;
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u32 hb_count;
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u32 disable_reqs;
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u32 enable_reqs;
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u32 disable_replies;
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u32 enable_replies;
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u32 rsvd;
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};
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/* IOC statistics */
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struct bfa_ioc_stats {
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struct bfa_ioc_drv_stats drv_stats; /*!< driver IOC stats */
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struct bfa_fw_ioc_stats fw_stats; /*!< firmware IOC stats */
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};
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enum bfa_ioc_type {
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BFA_IOC_TYPE_FC = 1,
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BFA_IOC_TYPE_FCoE = 2,
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BFA_IOC_TYPE_LL = 3,
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};
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/* IOC attributes returned in queries */
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struct bfa_ioc_attr {
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enum bfa_ioc_type ioc_type;
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enum bfa_ioc_state state; /*!< IOC state */
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struct bfa_adapter_attr adapter_attr; /*!< HBA attributes */
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struct bfa_ioc_driver_attr driver_attr; /*!< driver attr */
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struct bfa_ioc_pci_attr pci_attr;
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u8 port_id; /*!< port number */
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u8 port_mode; /*!< enum bfa_mode */
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u8 cap_bm; /*!< capability */
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u8 port_mode_cfg; /*!< enum bfa_mode */
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u8 def_fn; /*!< 1 if default fn */
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u8 rsvd[3]; /*!< 64bit align */
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};
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/* Adapter capability mask definition */
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enum {
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BFA_CM_HBA = 0x01,
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BFA_CM_CNA = 0x02,
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BFA_CM_NIC = 0x04,
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};
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/* ---------------------- mfg definitions ------------ */
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/* Checksum size */
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#define BFA_MFG_CHKSUM_SIZE 16
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#define BFA_MFG_PARTNUM_SIZE 14
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#define BFA_MFG_SUPPLIER_ID_SIZE 10
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#define BFA_MFG_SUPPLIER_PARTNUM_SIZE 20
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#define BFA_MFG_SUPPLIER_SERIALNUM_SIZE 20
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#define BFA_MFG_SUPPLIER_REVISION_SIZE 4
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/* BFA adapter manufacturing block definition.
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*
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* All numerical fields are in big-endian format.
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*/
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struct bfa_mfg_block {
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u8 version; /* manufacturing block version */
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u8 mfg_sig[3]; /* characters 'M', 'F', 'G' */
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u16 mfgsize; /* mfg block size */
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u16 u16_chksum; /* old u16 checksum */
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char brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
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char brcd_partnum[STRSZ(BFA_MFG_PARTNUM_SIZE)];
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u8 mfg_day; /* manufacturing day */
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u8 mfg_month; /* manufacturing month */
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u16 mfg_year; /* manufacturing year */
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u64 mfg_wwn; /* wwn base for this adapter */
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u8 num_wwn; /* number of wwns assigned */
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u8 mfg_speeds; /* speeds allowed for this adapter */
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u8 rsv[2];
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char supplier_id[STRSZ(BFA_MFG_SUPPLIER_ID_SIZE)];
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char supplier_partnum[STRSZ(BFA_MFG_SUPPLIER_PARTNUM_SIZE)];
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char supplier_serialnum[STRSZ(BFA_MFG_SUPPLIER_SERIALNUM_SIZE)];
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char supplier_revision[STRSZ(BFA_MFG_SUPPLIER_REVISION_SIZE)];
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u8 mfg_mac[ETH_ALEN]; /* base mac address */
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u8 num_mac; /* number of mac addresses */
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u8 rsv2;
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u32 card_type; /* card type */
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char cap_nic; /* capability nic */
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char cap_cna; /* capability cna */
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char cap_hba; /* capability hba */
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char cap_fc16g; /* capability fc 16g */
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char cap_sriov; /* capability sriov */
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char cap_mezz; /* capability mezz */
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u8 rsv3;
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u8 mfg_nports; /* number of ports */
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char media[8]; /* xfi/xaui */
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char initial_mode[8]; /* initial mode: hba/cna/nic */
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u8 rsv4[84];
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u8 md5_chksum[BFA_MFG_CHKSUM_SIZE]; /* md5 checksum */
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} __packed;
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/* ---------------------- pci definitions ------------ */
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/*
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* PCI device ID information
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*/
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enum {
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BFA_PCI_DEVICE_ID_CT2 = 0x22,
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};
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#define bfa_asic_id_ct(device) \
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((device) == PCI_DEVICE_ID_BROCADE_CT || \
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(device) == PCI_DEVICE_ID_BROCADE_CT_FC)
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#define bfa_asic_id_ct2(device) \
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((device) == BFA_PCI_DEVICE_ID_CT2)
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#define bfa_asic_id_ctc(device) \
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(bfa_asic_id_ct(device) || bfa_asic_id_ct2(device))
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/* PCI sub-system device and vendor ID information */
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enum {
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BFA_PCI_FCOE_SSDEVICE_ID = 0x14,
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BFA_PCI_CT2_SSID_FCoE = 0x22,
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BFA_PCI_CT2_SSID_ETH = 0x23,
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BFA_PCI_CT2_SSID_FC = 0x24,
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};
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enum bfa_mode {
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BFA_MODE_HBA = 1,
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BFA_MODE_CNA = 2,
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BFA_MODE_NIC = 3
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};
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/*
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* Flash module specific
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*/
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#define BFA_FLASH_PART_ENTRY_SIZE 32 /* partition entry size */
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#define BFA_FLASH_PART_MAX 32 /* maximal # of partitions */
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#define BFA_TOTAL_FLASH_SIZE 0x400000
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#define BFA_FLASH_PART_FWIMG 2
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#define BFA_FLASH_PART_MFG 7
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/*
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* flash partition attributes
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*/
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struct bfa_flash_part_attr {
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u32 part_type; /* partition type */
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u32 part_instance; /* partition instance */
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u32 part_off; /* partition offset */
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u32 part_size; /* partition size */
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u32 part_len; /* partition content length */
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u32 part_status; /* partition status */
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char rsv[BFA_FLASH_PART_ENTRY_SIZE - 24];
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};
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/*
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* flash attributes
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*/
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struct bfa_flash_attr {
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u32 status; /* flash overall status */
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u32 npart; /* num of partitions */
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struct bfa_flash_part_attr part[BFA_FLASH_PART_MAX];
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};
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#endif /* __BFA_DEFS_H__ */
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