5bdd5fbb35
The binding for the USB PHY went thru before the driver. However the new version of the driver now use the PHY core support for reset, and this expect the reset to be named "phy". So remove the "usb-" prefix from the the reset names. Signed-off-by: Alban Bedel <albeu@free.fr> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/15282/ Cc: linux-kernel@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Antony Pavlov <antonynpavlov@gmail.com> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org
172 lines
3.1 KiB
Plaintext
172 lines
3.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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#include <dt-bindings/clock/ath79-clk.h>
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/ {
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compatible = "qca,ar9132";
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#address-cells = <1>;
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#size-cells = <1>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "mips,mips24Kc";
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clocks = <&pll ATH79_CLK_CPU>;
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reg = <0>;
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};
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};
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cpuintc: interrupt-controller {
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compatible = "qca,ar9132-cpu-intc", "qca,ar7100-cpu-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>;
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qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
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<&ddr_ctrl 0>, <&ddr_ctrl 1>;
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};
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ahb {
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compatible = "simple-bus";
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&cpuintc>;
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apb {
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compatible = "simple-bus";
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&miscintc>;
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ddr_ctrl: memory-controller@18000000 {
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compatible = "qca,ar9132-ddr-controller",
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"qca,ar7240-ddr-controller";
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reg = <0x18000000 0x100>;
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#qca,ddr-wb-channel-cells = <1>;
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};
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uart: uart@18020000 {
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compatible = "ns8250";
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reg = <0x18020000 0x20>;
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interrupts = <3>;
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clocks = <&pll ATH79_CLK_AHB>;
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clock-names = "uart";
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reg-io-width = <4>;
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reg-shift = <2>;
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no-loopback-test;
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status = "disabled";
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};
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gpio: gpio@18040000 {
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compatible = "qca,ar9132-gpio",
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"qca,ar7100-gpio";
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reg = <0x18040000 0x30>;
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interrupts = <2>;
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ngpios = <22>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pll: pll-controller@18050000 {
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compatible = "qca,ar9132-pll",
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"qca,ar9130-pll";
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reg = <0x18050000 0x20>;
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clock-names = "ref";
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/* The board must provides the ref clock */
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#clock-cells = <1>;
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clock-output-names = "cpu", "ddr", "ahb";
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};
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wdt: wdt@18060008 {
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compatible = "qca,ar7130-wdt";
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reg = <0x18060008 0x8>;
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interrupts = <4>;
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clocks = <&pll ATH79_CLK_AHB>;
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clock-names = "wdt";
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};
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miscintc: interrupt-controller@18060010 {
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compatible = "qca,ar9132-misc-intc",
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"qca,ar7100-misc-intc";
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reg = <0x18060010 0x8>;
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interrupt-parent = <&cpuintc>;
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interrupts = <6>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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rst: reset-controller@1806001c {
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compatible = "qca,ar9132-reset",
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"qca,ar7100-reset";
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reg = <0x1806001c 0x4>;
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#reset-cells = <1>;
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};
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};
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usb: usb@1b000100 {
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compatible = "qca,ar7100-ehci", "generic-ehci";
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reg = <0x1b000100 0x100>;
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interrupts = <3>;
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resets = <&rst 5>;
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has-transaction-translator;
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phy-names = "usb";
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phys = <&usb_phy>;
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status = "disabled";
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};
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spi: spi@1f000000 {
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compatible = "qca,ar9132-spi", "qca,ar7100-spi";
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reg = <0x1f000000 0x10>;
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clocks = <&pll ATH79_CLK_AHB>;
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clock-names = "ahb";
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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usb_phy: usb-phy {
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compatible = "qca,ar7100-usb-phy";
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reset-names = "phy", "suspend-override";
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resets = <&rst 4>, <&rst 3>;
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#phy-cells = <0>;
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status = "disabled";
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};
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};
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