forked from Minki/linux
dac2f83fce
Adds a driver for built-in IXP4xx Ethernet ports. Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
277 lines
6.4 KiB
C
277 lines
6.4 KiB
C
/*
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* Intel IXP4xx Queue Manager driver for Linux
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*
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* Copyright (C) 2007 Krzysztof Halasa <khc@pm.waw.pl>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License
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* as published by the Free Software Foundation.
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*/
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <asm/arch/qmgr.h>
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#define DEBUG 0
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struct qmgr_regs __iomem *qmgr_regs;
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static struct resource *mem_res;
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static spinlock_t qmgr_lock;
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static u32 used_sram_bitmap[4]; /* 128 16-dword pages */
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static void (*irq_handlers[HALF_QUEUES])(void *pdev);
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static void *irq_pdevs[HALF_QUEUES];
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void qmgr_set_irq(unsigned int queue, int src,
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void (*handler)(void *pdev), void *pdev)
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{
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u32 __iomem *reg = &qmgr_regs->irqsrc[queue / 8]; /* 8 queues / u32 */
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int bit = (queue % 8) * 4; /* 3 bits + 1 reserved bit per queue */
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unsigned long flags;
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src &= 7;
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spin_lock_irqsave(&qmgr_lock, flags);
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__raw_writel((__raw_readl(reg) & ~(7 << bit)) | (src << bit), reg);
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irq_handlers[queue] = handler;
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irq_pdevs[queue] = pdev;
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spin_unlock_irqrestore(&qmgr_lock, flags);
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}
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static irqreturn_t qmgr_irq1(int irq, void *pdev)
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{
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int i;
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u32 val = __raw_readl(&qmgr_regs->irqstat[0]);
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__raw_writel(val, &qmgr_regs->irqstat[0]); /* ACK */
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for (i = 0; i < HALF_QUEUES; i++)
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if (val & (1 << i))
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irq_handlers[i](irq_pdevs[i]);
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return val ? IRQ_HANDLED : 0;
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}
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void qmgr_enable_irq(unsigned int queue)
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{
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unsigned long flags;
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spin_lock_irqsave(&qmgr_lock, flags);
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__raw_writel(__raw_readl(&qmgr_regs->irqen[0]) | (1 << queue),
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&qmgr_regs->irqen[0]);
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spin_unlock_irqrestore(&qmgr_lock, flags);
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}
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void qmgr_disable_irq(unsigned int queue)
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{
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unsigned long flags;
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spin_lock_irqsave(&qmgr_lock, flags);
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__raw_writel(__raw_readl(&qmgr_regs->irqen[0]) & ~(1 << queue),
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&qmgr_regs->irqen[0]);
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spin_unlock_irqrestore(&qmgr_lock, flags);
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}
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static inline void shift_mask(u32 *mask)
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{
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mask[3] = mask[3] << 1 | mask[2] >> 31;
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mask[2] = mask[2] << 1 | mask[1] >> 31;
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mask[1] = mask[1] << 1 | mask[0] >> 31;
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mask[0] <<= 1;
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}
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int qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */,
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unsigned int nearly_empty_watermark,
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unsigned int nearly_full_watermark)
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{
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u32 cfg, addr = 0, mask[4]; /* in 16-dwords */
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int err;
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if (queue >= HALF_QUEUES)
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return -ERANGE;
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if ((nearly_empty_watermark | nearly_full_watermark) & ~7)
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return -EINVAL;
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switch (len) {
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case 16:
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cfg = 0 << 24;
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mask[0] = 0x1;
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break;
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case 32:
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cfg = 1 << 24;
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mask[0] = 0x3;
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break;
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case 64:
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cfg = 2 << 24;
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mask[0] = 0xF;
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break;
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case 128:
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cfg = 3 << 24;
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mask[0] = 0xFF;
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break;
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default:
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return -EINVAL;
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}
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cfg |= nearly_empty_watermark << 26;
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cfg |= nearly_full_watermark << 29;
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len /= 16; /* in 16-dwords: 1, 2, 4 or 8 */
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mask[1] = mask[2] = mask[3] = 0;
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if (!try_module_get(THIS_MODULE))
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return -ENODEV;
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spin_lock_irq(&qmgr_lock);
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if (__raw_readl(&qmgr_regs->sram[queue])) {
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err = -EBUSY;
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goto err;
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}
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while (1) {
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if (!(used_sram_bitmap[0] & mask[0]) &&
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!(used_sram_bitmap[1] & mask[1]) &&
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!(used_sram_bitmap[2] & mask[2]) &&
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!(used_sram_bitmap[3] & mask[3]))
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break; /* found free space */
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addr++;
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shift_mask(mask);
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if (addr + len > ARRAY_SIZE(qmgr_regs->sram)) {
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printk(KERN_ERR "qmgr: no free SRAM space for"
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" queue %i\n", queue);
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err = -ENOMEM;
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goto err;
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}
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}
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used_sram_bitmap[0] |= mask[0];
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used_sram_bitmap[1] |= mask[1];
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used_sram_bitmap[2] |= mask[2];
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used_sram_bitmap[3] |= mask[3];
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__raw_writel(cfg | (addr << 14), &qmgr_regs->sram[queue]);
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spin_unlock_irq(&qmgr_lock);
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#if DEBUG
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printk(KERN_DEBUG "qmgr: requested queue %i, addr = 0x%02X\n",
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queue, addr);
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#endif
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return 0;
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err:
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spin_unlock_irq(&qmgr_lock);
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module_put(THIS_MODULE);
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return err;
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}
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void qmgr_release_queue(unsigned int queue)
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{
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u32 cfg, addr, mask[4];
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BUG_ON(queue >= HALF_QUEUES); /* not in valid range */
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spin_lock_irq(&qmgr_lock);
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cfg = __raw_readl(&qmgr_regs->sram[queue]);
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addr = (cfg >> 14) & 0xFF;
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BUG_ON(!addr); /* not requested */
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switch ((cfg >> 24) & 3) {
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case 0: mask[0] = 0x1; break;
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case 1: mask[0] = 0x3; break;
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case 2: mask[0] = 0xF; break;
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case 3: mask[0] = 0xFF; break;
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}
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mask[1] = mask[2] = mask[3] = 0;
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while (addr--)
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shift_mask(mask);
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__raw_writel(0, &qmgr_regs->sram[queue]);
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used_sram_bitmap[0] &= ~mask[0];
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used_sram_bitmap[1] &= ~mask[1];
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used_sram_bitmap[2] &= ~mask[2];
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used_sram_bitmap[3] &= ~mask[3];
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irq_handlers[queue] = NULL; /* catch IRQ bugs */
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spin_unlock_irq(&qmgr_lock);
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module_put(THIS_MODULE);
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#if DEBUG
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printk(KERN_DEBUG "qmgr: released queue %i\n", queue);
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#endif
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}
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static int qmgr_init(void)
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{
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int i, err;
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mem_res = request_mem_region(IXP4XX_QMGR_BASE_PHYS,
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IXP4XX_QMGR_REGION_SIZE,
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"IXP4xx Queue Manager");
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if (mem_res == NULL)
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return -EBUSY;
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qmgr_regs = ioremap(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE);
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if (qmgr_regs == NULL) {
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err = -ENOMEM;
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goto error_map;
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}
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/* reset qmgr registers */
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for (i = 0; i < 4; i++) {
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__raw_writel(0x33333333, &qmgr_regs->stat1[i]);
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__raw_writel(0, &qmgr_regs->irqsrc[i]);
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}
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for (i = 0; i < 2; i++) {
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__raw_writel(0, &qmgr_regs->stat2[i]);
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__raw_writel(0xFFFFFFFF, &qmgr_regs->irqstat[i]); /* clear */
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__raw_writel(0, &qmgr_regs->irqen[i]);
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}
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for (i = 0; i < QUEUES; i++)
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__raw_writel(0, &qmgr_regs->sram[i]);
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err = request_irq(IRQ_IXP4XX_QM1, qmgr_irq1, 0,
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"IXP4xx Queue Manager", NULL);
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if (err) {
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printk(KERN_ERR "qmgr: failed to request IRQ%i\n",
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IRQ_IXP4XX_QM1);
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goto error_irq;
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}
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used_sram_bitmap[0] = 0xF; /* 4 first pages reserved for config */
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spin_lock_init(&qmgr_lock);
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printk(KERN_INFO "IXP4xx Queue Manager initialized.\n");
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return 0;
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error_irq:
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iounmap(qmgr_regs);
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error_map:
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release_mem_region(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE);
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return err;
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}
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static void qmgr_remove(void)
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{
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free_irq(IRQ_IXP4XX_QM1, NULL);
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synchronize_irq(IRQ_IXP4XX_QM1);
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iounmap(qmgr_regs);
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release_mem_region(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE);
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}
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module_init(qmgr_init);
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module_exit(qmgr_remove);
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Krzysztof Halasa");
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EXPORT_SYMBOL(qmgr_regs);
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EXPORT_SYMBOL(qmgr_set_irq);
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EXPORT_SYMBOL(qmgr_enable_irq);
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EXPORT_SYMBOL(qmgr_disable_irq);
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EXPORT_SYMBOL(qmgr_request_queue);
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EXPORT_SYMBOL(qmgr_release_queue);
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