forked from Minki/linux
be20902ba6
Rather than each platform providing its own function to adjust the zone sizes, use the new ARM_DMA_ZONE_SIZE definition to perform this adjustment. This ensures that the actual DMA zone size and the ISA_DMA_THRESHOLD/MAX_DMA_ADDRESS definitions are consistent with each other, and moves this complexity out of the platform code. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
46 lines
1.2 KiB
C
46 lines
1.2 KiB
C
/*
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* arch/arm/mach-sa1100/include/mach/memory.h
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*
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* Copyright (C) 1999-2000 Nicolas Pitre <nico@fluxnic.net>
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*/
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#ifndef __ASM_ARCH_MEMORY_H
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#define __ASM_ARCH_MEMORY_H
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#include <asm/sizes.h>
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/*
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* Physical DRAM offset is 0xc0000000 on the SA1100
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*/
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#define PLAT_PHYS_OFFSET UL(0xc0000000)
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#ifdef CONFIG_SA1111
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#define ARM_DMA_ZONE_SIZE SZ_1M
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#endif
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/*
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* Because of the wide memory address space between physical RAM banks on the
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* SA1100, it's much convenient to use Linux's SparseMEM support to implement
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* our memory map representation. Assuming all memory nodes have equal access
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* characteristics, we then have generic discontiguous memory support.
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*
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* The sparsemem banks are matched with the physical memory bank addresses
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* which are incidentally the same as virtual addresses.
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*
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* node 0: 0xc0000000 - 0xc7ffffff
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* node 1: 0xc8000000 - 0xcfffffff
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* node 2: 0xd0000000 - 0xd7ffffff
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* node 3: 0xd8000000 - 0xdfffffff
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*/
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#define MAX_PHYSMEM_BITS 32
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#define SECTION_SIZE_BITS 27
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/*
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* Cache flushing area - SA1100 zero bank
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*/
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#define FLUSH_BASE_PHYS 0xe0000000
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#define FLUSH_BASE 0xf5000000
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#define FLUSH_BASE_MINICACHE 0xf5100000
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#endif
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