forked from Minki/linux
6dfe991113
Remove the if..else statement from smipcie-ir.c and add the remote controller map as a configuration parameter for the card. Signed-off-by: Olli Salonen <olli.salonen@iki.fi> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
233 lines
5.7 KiB
C
233 lines
5.7 KiB
C
/*
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* SMI PCIe driver for DVBSky cards.
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*
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* Copyright (C) 2014 Max nibble <nibble.max@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "smipcie.h"
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static void smi_ir_enableInterrupt(struct smi_rc *ir)
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{
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struct smi_dev *dev = ir->dev;
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smi_write(MSI_INT_ENA_SET, IR_X_INT);
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}
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static void smi_ir_disableInterrupt(struct smi_rc *ir)
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{
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struct smi_dev *dev = ir->dev;
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smi_write(MSI_INT_ENA_CLR, IR_X_INT);
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}
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static void smi_ir_clearInterrupt(struct smi_rc *ir)
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{
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struct smi_dev *dev = ir->dev;
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smi_write(MSI_INT_STATUS_CLR, IR_X_INT);
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}
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static void smi_ir_stop(struct smi_rc *ir)
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{
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struct smi_dev *dev = ir->dev;
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smi_ir_disableInterrupt(ir);
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smi_clear(IR_Init_Reg, 0x80);
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}
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#define BITS_PER_COMMAND 14
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#define GROUPS_PER_BIT 2
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#define IR_RC5_MIN_BIT 36
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#define IR_RC5_MAX_BIT 52
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static u32 smi_decode_rc5(u8 *pData, u8 size)
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{
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u8 index, current_bit, bit_count;
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u8 group_array[BITS_PER_COMMAND * GROUPS_PER_BIT + 4];
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u8 group_index = 0;
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u32 command = 0xFFFFFFFF;
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group_array[group_index++] = 1;
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for (index = 0; index < size; index++) {
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current_bit = (pData[index] & 0x80) ? 1 : 0;
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bit_count = pData[index] & 0x7f;
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if ((current_bit == 1) && (bit_count >= 2*IR_RC5_MAX_BIT + 1)) {
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goto process_code;
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} else if ((bit_count >= IR_RC5_MIN_BIT) &&
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(bit_count <= IR_RC5_MAX_BIT)) {
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group_array[group_index++] = current_bit;
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} else if ((bit_count > IR_RC5_MAX_BIT) &&
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(bit_count <= 2*IR_RC5_MAX_BIT)) {
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group_array[group_index++] = current_bit;
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group_array[group_index++] = current_bit;
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} else {
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goto invalid_timing;
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}
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if (group_index >= BITS_PER_COMMAND*GROUPS_PER_BIT)
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goto process_code;
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if ((group_index == BITS_PER_COMMAND*GROUPS_PER_BIT - 1)
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&& (group_array[group_index-1] == 0)) {
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group_array[group_index++] = 1;
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goto process_code;
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}
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}
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process_code:
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if (group_index == (BITS_PER_COMMAND*GROUPS_PER_BIT-1))
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group_array[group_index++] = 1;
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if (group_index == BITS_PER_COMMAND*GROUPS_PER_BIT) {
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command = 0;
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for (index = 0; index < (BITS_PER_COMMAND*GROUPS_PER_BIT);
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index = index + 2) {
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if ((group_array[index] == 1) &&
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(group_array[index+1] == 0)) {
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command |= (1 << (BITS_PER_COMMAND -
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(index/2) - 1));
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} else if ((group_array[index] == 0) &&
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(group_array[index+1] == 1)) {
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/* */
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} else {
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command = 0xFFFFFFFF;
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goto invalid_timing;
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}
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}
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}
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invalid_timing:
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return command;
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}
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static void smi_ir_decode(struct work_struct *work)
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{
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struct smi_rc *ir = container_of(work, struct smi_rc, work);
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struct smi_dev *dev = ir->dev;
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struct rc_dev *rc_dev = ir->rc_dev;
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u32 dwIRControl, dwIRData, dwIRCode, scancode;
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u8 index, ucIRCount, readLoop, rc5_command, rc5_system, toggle;
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dwIRControl = smi_read(IR_Init_Reg);
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if (dwIRControl & rbIRVld) {
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ucIRCount = (u8) smi_read(IR_Data_Cnt);
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if (ucIRCount < 4)
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goto end_ir_decode;
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readLoop = ucIRCount/4;
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if (ucIRCount % 4)
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readLoop += 1;
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for (index = 0; index < readLoop; index++) {
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dwIRData = smi_read(IR_DATA_BUFFER_BASE + (index*4));
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ir->irData[index*4 + 0] = (u8)(dwIRData);
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ir->irData[index*4 + 1] = (u8)(dwIRData >> 8);
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ir->irData[index*4 + 2] = (u8)(dwIRData >> 16);
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ir->irData[index*4 + 3] = (u8)(dwIRData >> 24);
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}
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dwIRCode = smi_decode_rc5(ir->irData, ucIRCount);
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if (dwIRCode != 0xFFFFFFFF) {
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rc5_command = dwIRCode & 0x3F;
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rc5_system = (dwIRCode & 0x7C0) >> 6;
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toggle = (dwIRCode & 0x800) ? 1 : 0;
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scancode = rc5_system << 8 | rc5_command;
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rc_keydown(rc_dev, RC_TYPE_RC5, scancode, toggle);
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}
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}
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end_ir_decode:
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smi_set(IR_Init_Reg, 0x04);
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smi_ir_enableInterrupt(ir);
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}
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/* ir functions call by main driver.*/
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int smi_ir_irq(struct smi_rc *ir, u32 int_status)
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{
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int handled = 0;
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if (int_status & IR_X_INT) {
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smi_ir_disableInterrupt(ir);
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smi_ir_clearInterrupt(ir);
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schedule_work(&ir->work);
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handled = 1;
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}
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return handled;
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}
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void smi_ir_start(struct smi_rc *ir)
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{
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struct smi_dev *dev = ir->dev;
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smi_write(IR_Idle_Cnt_Low, 0x00140070);
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msleep(20);
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smi_set(IR_Init_Reg, 0x90);
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smi_ir_enableInterrupt(ir);
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}
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int smi_ir_init(struct smi_dev *dev)
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{
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int ret;
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struct rc_dev *rc_dev;
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struct smi_rc *ir = &dev->ir;
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rc_dev = rc_allocate_device();
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if (!rc_dev)
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return -ENOMEM;
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/* init input device */
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snprintf(ir->input_name, sizeof(ir->input_name), "IR (%s)",
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dev->info->name);
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snprintf(ir->input_phys, sizeof(ir->input_phys), "pci-%s/ir0",
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pci_name(dev->pci_dev));
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rc_dev->driver_name = "SMI_PCIe";
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rc_dev->input_phys = ir->input_phys;
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rc_dev->input_name = ir->input_name;
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rc_dev->input_id.bustype = BUS_PCI;
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rc_dev->input_id.version = 1;
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rc_dev->input_id.vendor = dev->pci_dev->subsystem_vendor;
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rc_dev->input_id.product = dev->pci_dev->subsystem_device;
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rc_dev->dev.parent = &dev->pci_dev->dev;
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rc_dev->driver_type = RC_DRIVER_SCANCODE;
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rc_dev->map_name = dev->info->rc_map;
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ir->rc_dev = rc_dev;
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ir->dev = dev;
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INIT_WORK(&ir->work, smi_ir_decode);
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smi_ir_disableInterrupt(ir);
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ret = rc_register_device(rc_dev);
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if (ret)
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goto ir_err;
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return 0;
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ir_err:
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rc_free_device(rc_dev);
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return ret;
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}
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void smi_ir_exit(struct smi_dev *dev)
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{
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struct smi_rc *ir = &dev->ir;
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struct rc_dev *rc_dev = ir->rc_dev;
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smi_ir_stop(ir);
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rc_unregister_device(rc_dev);
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ir->rc_dev = NULL;
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}
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