forked from Minki/linux
13ca970e36
In order to support the scalability of the hardware version, the
features irrelevant to the hardware will be located in the hns-roce.ko,
and the hardware relevant operations will be located in hns_roce_hw_v1.ko
or hns_roce_hw_v2.ko based on the series chips.
The hip08 RoCE engine is a PCI device, hip06 RoCE engine is a platform
device. In order to support both platform device and PCI device, We
replace &hr_dev->pdev->dev with hr_dev->dev in hns-roce.ko as belows:
Before modification:
struct device *dev = hr_dev->dev;
After modification:
struct device *dev = &hr_dev->pdev->dev;
The related structure:
struct hns_roce_dev {
...
struct platform_device *pdev;
struct pci_dev *pci_dev;
struct device *dev;
...
}
Signed-off-by: Lijun Ou <oulijun@huawei.com>
Signed-off-by: Shaobo Xu <xushaobo2@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
140 lines
4.1 KiB
C
140 lines
4.1 KiB
C
/*
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* Copyright (c) 2016 Hisilicon Limited.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <linux/platform_device.h>
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#include <rdma/ib_addr.h>
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#include <rdma/ib_cache.h>
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#include "hns_roce_device.h"
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#define HNS_ROCE_PORT_NUM_SHIFT 24
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#define HNS_ROCE_VLAN_SL_BIT_MASK 7
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#define HNS_ROCE_VLAN_SL_SHIFT 13
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struct ib_ah *hns_roce_create_ah(struct ib_pd *ibpd,
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struct rdma_ah_attr *ah_attr,
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struct ib_udata *udata)
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{
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struct hns_roce_dev *hr_dev = to_hr_dev(ibpd->device);
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struct device *dev = hr_dev->dev;
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struct ib_gid_attr gid_attr;
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struct hns_roce_ah *ah;
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u16 vlan_tag = 0xffff;
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struct in6_addr in6;
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const struct ib_global_route *grh = rdma_ah_read_grh(ah_attr);
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union ib_gid sgid;
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int ret;
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ah = kzalloc(sizeof(*ah), GFP_ATOMIC);
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if (!ah)
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return ERR_PTR(-ENOMEM);
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/* Get mac address */
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memcpy(&in6, grh->dgid.raw, sizeof(grh->dgid.raw));
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if (rdma_is_multicast_addr(&in6)) {
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rdma_get_mcast_mac(&in6, ah->av.mac);
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} else {
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u8 *dmac = rdma_ah_retrieve_dmac(ah_attr);
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if (!dmac) {
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kfree(ah);
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return ERR_PTR(-EINVAL);
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}
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memcpy(ah->av.mac, dmac, ETH_ALEN);
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}
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/* Get source gid */
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ret = ib_get_cached_gid(ibpd->device, rdma_ah_get_port_num(ah_attr),
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grh->sgid_index, &sgid, &gid_attr);
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if (ret) {
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dev_err(dev, "get sgid failed! ret = %d\n", ret);
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kfree(ah);
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return ERR_PTR(ret);
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}
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if (gid_attr.ndev) {
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if (is_vlan_dev(gid_attr.ndev))
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vlan_tag = vlan_dev_vlan_id(gid_attr.ndev);
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dev_put(gid_attr.ndev);
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}
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if (vlan_tag < 0x1000)
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vlan_tag |= (rdma_ah_get_sl(ah_attr) &
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HNS_ROCE_VLAN_SL_BIT_MASK) <<
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HNS_ROCE_VLAN_SL_SHIFT;
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ah->av.port_pd = cpu_to_be32(to_hr_pd(ibpd)->pdn |
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(rdma_ah_get_port_num(ah_attr) <<
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HNS_ROCE_PORT_NUM_SHIFT));
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ah->av.gid_index = grh->sgid_index;
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ah->av.vlan = cpu_to_le16(vlan_tag);
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dev_dbg(dev, "gid_index = 0x%x,vlan = 0x%x\n", ah->av.gid_index,
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ah->av.vlan);
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if (rdma_ah_get_static_rate(ah_attr))
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ah->av.stat_rate = IB_RATE_10_GBPS;
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memcpy(ah->av.dgid, grh->dgid.raw, HNS_ROCE_GID_SIZE);
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ah->av.sl_tclass_flowlabel = cpu_to_le32(rdma_ah_get_sl(ah_attr) <<
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HNS_ROCE_SL_SHIFT);
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return &ah->ibah;
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}
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int hns_roce_query_ah(struct ib_ah *ibah, struct rdma_ah_attr *ah_attr)
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{
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struct hns_roce_ah *ah = to_hr_ah(ibah);
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memset(ah_attr, 0, sizeof(*ah_attr));
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rdma_ah_set_sl(ah_attr, (le32_to_cpu(ah->av.sl_tclass_flowlabel) >>
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HNS_ROCE_SL_SHIFT));
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rdma_ah_set_port_num(ah_attr, (le32_to_cpu(ah->av.port_pd) >>
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HNS_ROCE_PORT_NUM_SHIFT));
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rdma_ah_set_static_rate(ah_attr, ah->av.stat_rate);
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rdma_ah_set_grh(ah_attr, NULL,
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(le32_to_cpu(ah->av.sl_tclass_flowlabel) &
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HNS_ROCE_FLOW_LABLE_MASK), ah->av.gid_index,
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ah->av.hop_limit,
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(le32_to_cpu(ah->av.sl_tclass_flowlabel) >>
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HNS_ROCE_TCLASS_SHIFT));
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rdma_ah_set_dgid_raw(ah_attr, ah->av.dgid);
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return 0;
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}
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int hns_roce_destroy_ah(struct ib_ah *ah)
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{
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kfree(to_hr_ah(ah));
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return 0;
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}
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