Ben Skeggs 134f248bea drm/nv50: fix alignment of per-channel fifo cache ... GPU pointer to the structure is shifted right by 10 bits, so we need to align to 1024 bytes, not 256. Reported-by: Maarten Maathuis <madman2003@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>		2010-01-18 09:56:19 +10:00
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drm	drm/nv50: fix alignment of per-channel fifo cache	2010-01-18 09:56:19 +10:00
vga	PCI/vgaarb: cleanup some warnings + cleanup some comments.	2009-09-09 13:29:41 -07:00
Makefile	PCI/GPU: implement VGA arbitration on Linux	2009-09-09 13:29:36 -07:00