'linux,stdout-path' has been deprecated for some time in favor of 'stdout-path'. Now dtc will warn on occurrences of 'linux,stdout-path'. Search and replace all the of occurrences with 'stdout-path'. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
		
			
				
	
	
		
			614 lines
		
	
	
		
			13 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			614 lines
		
	
	
		
			13 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| /*
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|  * Device Tree Source for FSP2
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|  *
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|  * Copyright 2010,2012 IBM Corp.
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|  *
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|  * This file is licensed under the terms of the GNU General Public
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|  * License version 2.  This program is licensed "as is" without
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|  * any warranty of any kind, whether express or implied.
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|  */
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| 
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| 
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| /dts-v1/;
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| 
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| / {
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| 	#address-cells = <2>;
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| 	#size-cells = <1>;
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| 	model = "ibm,fsp2";
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| 	compatible = "ibm,fsp2";
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| 	dcr-parent = <&{/cpus/cpu@0}>;
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| 
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| 	aliases {
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| 		ethernet0 = &EMAC0;
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| 		ethernet1 = &EMAC1;
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| 		serial0 = &UART0;
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| 	};
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| 
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| 	cpus {
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| 		#address-cells = <1>;
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| 		#size-cells = <0>;
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| 
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| 		cpu@0 {
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| 			device_type = "cpu";
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| 			model = "PowerPC, 476FSP2";
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| 			reg = <0x0>;
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| 			clock-frequency = <0>;    /* Filled in by cuboot */
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| 			timebase-frequency = <0>; /* Filled in by cuboot */
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| 			i-cache-line-size = <32>;
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| 			d-cache-line-size = <32>;
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| 			d-cache-size = <32768>;
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| 			i-cache-size = <32768>;
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| 			dcr-controller;
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| 			dcr-access-method = "native";
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| 		};
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| 	};
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| 
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| 	memory {
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| 		device_type = "memory";
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| 		reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by
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| 							     cuboot */
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| 	};
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| 
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| 	clocks {
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| 		mmc_clk: mmc_clk {
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| 			compatible = "fixed-clock";
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| 			#clock-cells = <0>;
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| 			clock-frequency = <50000000>;
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| 			clock-output-names = "mmc_clk";
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| 		};
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| 	};
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| 
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| 	UIC0: uic0 {
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| 		#address-cells = <0>;
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| 		#size-cells = <0>;
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| 		#interrupt-cells = <2>;
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| 		compatible = "ibm,uic";
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| 		interrupt-controller;
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| 		cell-index = <0>;
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| 		dcr-reg = <0x2c0 0x8>;
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| 	};
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| 
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| 	/* "interrupts" field is <bit level bit level>
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| 	   first pair is non-critical, second is critical */
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| 	UIC1_0: uic1_0 {
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| 		#address-cells = <0>;
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| 		#size-cells = <0>;
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| 		#interrupt-cells = <2>;
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| 
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| 		compatible = "ibm,uic";
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| 		interrupt-controller;
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| 		cell-index = <1>;
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| 		dcr-reg = <0x2c8 0x8>;
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| 		interrupt-parent = <&UIC0>;
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| 		interrupts = <21 0x4 4 0x84>;
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| 	};
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| 
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| 	/* PSI and DMA */
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| 	UIC1_1: uic1_1 {
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| 		#address-cells = <0>;
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| 		#size-cells = <0>;
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| 		#interrupt-cells = <2>;
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| 
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| 		compatible = "ibm,uic";
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| 		interrupt-controller;
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| 		cell-index = <2>;
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| 		dcr-reg = <0x350 0x8>;
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| 		interrupt-parent = <&UIC0>;
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| 		interrupts = <22 0x4 5 0x84>;
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| 	};
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| 
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| 	/* Ethernet and USB */
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| 	UIC1_2: uic1_2 {
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| 		#address-cells = <0>;
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| 		#size-cells = <0>;
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| 		#interrupt-cells = <2>;
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| 
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| 		compatible = "ibm,uic";
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| 		interrupt-controller;
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| 		cell-index = <3>;
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| 		dcr-reg = <0x358 0x8>;
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| 		interrupt-parent = <&UIC0>;
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| 		interrupts = <23 0x4 6 0x84>;
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| 	};
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| 
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| 	/* PLB Errors */
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| 	UIC1_3: uic1_3 {
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| 		#address-cells = <0>;
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| 		#size-cells = <0>;
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| 		#interrupt-cells = <2>;
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| 
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| 		compatible = "ibm,uic";
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| 		interrupt-controller;
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| 		cell-index = <4>;
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| 		dcr-reg = <0x360 0x8>;
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| 		interrupt-parent = <&UIC0>;
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| 		interrupts = <24 0x4 7 0x84>;
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| 	};
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| 
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| 	UIC1_4: uic1_4 {
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| 		#address-cells = <0>;
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| 		#size-cells = <0>;
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| 		#interrupt-cells = <2>;
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| 
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| 		compatible = "ibm,uic";
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| 		interrupt-controller;
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| 		cell-index = <5>;
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| 		dcr-reg = <0x368 0x8>;
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| 		interrupt-parent = <&UIC0>;
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| 		interrupts = <25 0x4 8 0x84>;
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| 	};
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| 
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| 	UIC1_5: uic1_5 {
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| 		#address-cells = <0>;
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| 		#size-cells = <0>;
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| 		#interrupt-cells = <2>;
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| 
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| 		compatible = "ibm,uic";
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| 		interrupt-controller;
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| 		cell-index = <6>;
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| 		dcr-reg = <0x370 0x8>;
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| 		interrupt-parent = <&UIC0>;
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| 		interrupts = <26 0x4 9 0x84>;
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| 	};
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| 
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| 	/* 2nd level UICs for FSI */
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| 	UIC2_0: uic2_0 {
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| 		#address-cells = <0>;
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| 		#size-cells = <0>;
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| 		#interrupt-cells = <2>;
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| 
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| 		compatible = "ibm,uic";
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| 		interrupt-controller;
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| 		cell-index = <7>;
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| 		dcr-reg = <0x2d0 0x8>;
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| 		interrupt-parent = <&UIC1_0>;
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| 		interrupts = <16 0x4 0 0x84>;
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| 	};
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| 
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| 	UIC2_1: uic2_1 {
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| 		#address-cells = <0>;
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| 		#size-cells = <0>;
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| 		#interrupt-cells = <2>;
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| 
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| 		compatible = "ibm,uic";
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| 		interrupt-controller;
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| 		cell-index = <8>;
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| 		dcr-reg = <0x2d8 0x8>;
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| 		interrupt-parent = <&UIC1_0>;
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| 		interrupts = <17 0x4 1 0x84>;
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| 	};
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| 
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| 	UIC2_2: uic2_2 {
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| 		#address-cells = <0>;
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| 		#size-cells = <0>;
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| 		#interrupt-cells = <2>;
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| 
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| 		compatible = "ibm,uic";
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| 		interrupt-controller;
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| 		cell-index = <9>;
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| 		dcr-reg = <0x2e0 0x8>;
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| 		interrupt-parent = <&UIC1_0>;
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| 		interrupts = <18 0x4 2 0x84>;
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| 	};
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| 
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| 	UIC2_3: uic2_3 {
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| 		#address-cells = <0>;
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| 		#size-cells = <0>;
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| 		#interrupt-cells = <2>;
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| 
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| 		compatible = "ibm,uic";
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| 		interrupt-controller;
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| 		cell-index = <10>;
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| 		dcr-reg = <0x2e8 0x8>;
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| 		interrupt-parent = <&UIC1_0>;
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| 		interrupts = <19 0x4 3 0x84>;
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| 	};
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| 
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| 	UIC2_4: uic2_4 {
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| 		#address-cells = <0>;
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| 		#size-cells = <0>;
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| 		#interrupt-cells = <2>;
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| 
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| 		compatible = "ibm,uic";
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| 		interrupt-controller;
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| 		cell-index = <11>;
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| 		dcr-reg = <0x2f0 0x8>;
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| 		interrupt-parent = <&UIC1_0>;
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| 		interrupts = <20 0x4 4 0x84>;
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| 	};
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| 
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| 	UIC2_5: uic2_5 {
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| 		#address-cells = <0>;
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| 		#size-cells = <0>;
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| 		#interrupt-cells = <2>;
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| 
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| 		compatible = "ibm,uic";
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| 		interrupt-controller;
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| 		cell-index = <12>;
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| 		dcr-reg = <0x2f8 0x8>;
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| 		interrupt-parent = <&UIC1_0>;
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| 		interrupts = <21 0x4 5 0x84>;
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| 	};
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| 
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| 	UIC2_6: uic2_6 {
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| 		#address-cells = <0>;
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| 		#size-cells = <0>;
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| 		#interrupt-cells = <2>;
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| 
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| 		compatible = "ibm,uic";
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| 		interrupt-controller;
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| 		cell-index = <13>;
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| 		dcr-reg = <0x300 0x8>;
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| 		interrupt-parent = <&UIC1_0>;
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| 		interrupts = <22 0x4 6 0x84>;
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| 	};
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| 
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| 	UIC2_7: uic2_7 {
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| 		#address-cells = <0>;
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| 		#size-cells = <0>;
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| 		#interrupt-cells = <2>;
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| 
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| 		compatible = "ibm,uic";
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| 		interrupt-controller;
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| 		cell-index = <14>;
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| 		dcr-reg = <0x308 0x8>;
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| 		interrupt-parent = <&UIC1_0>;
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| 		interrupts = <23 0x4 7 0x84>;
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| 	};
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| 
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| 	UIC2_8: uic2_8 {
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| 		#address-cells = <0>;
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| 		#size-cells = <0>;
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| 		#interrupt-cells = <2>;
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| 
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| 		compatible = "ibm,uic";
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| 		interrupt-controller;
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| 		cell-index = <15>;
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| 		dcr-reg = <0x310 0x8>;
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| 		interrupt-parent = <&UIC1_0>;
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| 		interrupts = <24 0x4 8 0x84>;
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| 	};
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| 
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| 	UIC2_9: uic2_9 {
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| 		#address-cells = <0>;
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| 		#size-cells = <0>;
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| 		#interrupt-cells = <2>;
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| 
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| 		compatible = "ibm,uic";
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| 		interrupt-controller;
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| 		cell-index = <16>;
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| 		dcr-reg = <0x318 0x8>;
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| 		interrupt-parent = <&UIC1_0>;
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| 		interrupts = <25 0x4 9 0x84>;
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| 	};
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| 
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| 	UIC2_10: uic2_10 {
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| 		#address-cells = <0>;
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| 		#size-cells = <0>;
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| 		#interrupt-cells = <2>;
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| 
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| 		compatible = "ibm,uic";
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| 		interrupt-controller;
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| 		cell-index = <17>;
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| 		dcr-reg = <0x320 0x8>;
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| 		interrupt-parent = <&UIC1_0>;
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| 		interrupts = <26 0x4 10 0x84>;
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| 	};
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| 
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| 	UIC2_11: uic2_11 {
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| 		#address-cells = <0>;
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| 		#size-cells = <0>;
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| 		#interrupt-cells = <2>;
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| 
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| 		compatible = "ibm,uic";
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| 		interrupt-controller;
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| 		cell-index = <18>;
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| 		dcr-reg = <0x328 0x8>;
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| 		interrupt-parent = <&UIC1_0>;
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| 		interrupts = <27 0x4 11 0x84>;
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| 	};
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| 
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| 	UIC2_12: uic2_12 {
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| 		#address-cells = <0>;
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| 		#size-cells = <0>;
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| 		#interrupt-cells = <2>;
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| 
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| 		compatible = "ibm,uic";
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| 		interrupt-controller;
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| 		cell-index = <19>;
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| 		dcr-reg = <0x330 0x8>;
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| 		interrupt-parent = <&UIC1_0>;
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| 		interrupts = <28 0x4 12 0x84>;
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| 	};
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| 
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| 	UIC2_13: uic2_13 {
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| 		#address-cells = <0>;
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| 		#size-cells = <0>;
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| 		#interrupt-cells = <2>;
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| 
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| 		compatible = "ibm,uic";
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| 		interrupt-controller;
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| 		cell-index = <20>;
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| 		dcr-reg = <0x338 0x8>;
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| 		interrupt-parent = <&UIC1_0>;
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| 		interrupts = <29 0x4 13 0x84>;
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| 	};
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| 
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| 	UIC2_14: uic2_14 {
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| 		#address-cells = <0>;
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| 		#size-cells = <0>;
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| 		#interrupt-cells = <2>;
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| 
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| 		compatible = "ibm,uic";
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| 		interrupt-controller;
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| 		cell-index = <21>;
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| 		dcr-reg = <0x340 0x8>;
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| 		interrupt-parent = <&UIC1_0>;
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| 		interrupts = <30 0x4 14 0x84>;
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| 	};
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| 
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| 	UIC2_15: uic2_15 {
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| 		#address-cells = <0>;
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| 		#size-cells = <0>;
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| 		#interrupt-cells = <2>;
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| 
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| 		compatible = "ibm,uic";
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| 		interrupt-controller;
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| 		cell-index = <22>;
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| 		dcr-reg = <0x348 0x8>;
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| 		interrupt-parent = <&UIC1_0>;
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| 		interrupts = <31 0x4 15 0x84>;
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| 	};
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| 
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| 	plb6 {
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| 		compatible = "ibm,plb6";
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| 		#address-cells = <2>;
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| 		#size-cells = <1>;
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| 		ranges;
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| 
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| 		MCW0: memory-controller-wrapper {
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| 			compatible = "ibm,cw-476fsp2";
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| 			dcr-reg = <0x11111800 0x40>;
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| 		};
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| 
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| 		MCIF0: memory-controller {
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| 			compatible = "ibm,sdram-476fsp2", "ibm,sdram-4xx-ddr3";
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| 			dcr-reg = <0x11120000 0x10000>;
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| 			mcer-device = <&MCW0>;
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| 			interrupt-parent = <&UIC0>;
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| 			interrupts = <10 0x84   /* ECC UE */
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| 				      11 0x84>; /* ECC CE */
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| 		};
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| 	};
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| 
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| 	plb4 {
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| 		compatible = "ibm,plb4";
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| 		#address-cells = <1>;
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| 		#size-cells = <1>;
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| 		ranges = <0x00000000 0x00000010 0x00000000 0x80000000
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| 			  0x80000000 0x00000010 0x80000000 0x80000000>;
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| 		clock-frequency = <333333334>;
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| 
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| 		plb6-system-hung-irq {
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| 			compatible = "ibm,bus-error-irq";
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| 			#interrupt-cells = <2>;
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| 			interrupt-parent = <&UIC0>;
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| 			interrupts = <0 0x84>;
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| 		};
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| 
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| 		l2-error-irq {
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| 			compatible = "ibm,bus-error-irq";
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| 			#interrupt-cells = <2>;
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| 			interrupt-parent = <&UIC0>;
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| 			interrupts = <20 0x84>;
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| 		};
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| 
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| 		plb6-plb4-irq {
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| 			compatible = "ibm,bus-error-irq";
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| 			#interrupt-cells = <2>;
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| 			interrupt-parent = <&UIC0>;
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| 			interrupts = <1 0x84>;
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| 		};
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| 
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| 		plb4-ahb-irq {
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| 			compatible = "ibm,bus-error-irq";
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| 			#interrupt-cells = <2>;
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| 			interrupt-parent = <&UIC1_3>;
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| 			interrupts = <20 0x84>;
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| 		};
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| 
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| 		opbd-error-irq {
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| 			compatible = "ibm,opbd-error-irq";
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| 			#interrupt-cells = <2>;
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| 			interrupt-parent = <&UIC1_4>;
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| 			interrupts = <5 0x84>;
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| 		};
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| 
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| 		cmu-error-irq {
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| 			compatible = "ibm,cmu-error-irq";
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| 			#interrupt-cells = <2>;
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| 			interrupt-parent = <&UIC0>;
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| 			interrupts = <28 0x84>;
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| 		};
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| 
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| 		conf-error-irq {
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| 			compatible = "ibm,conf-error-irq";
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| 			#interrupt-cells = <2>;
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| 			interrupt-parent = <&UIC1_4>;
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| 			interrupts = <11 0x84>;
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| 		};
 | |
| 
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| 		mc-ue-irq {
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| 			compatible = "ibm,mc-ue-irq";
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| 			#interrupt-cells = <2>;
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| 			interrupt-parent = <&UIC0>;
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| 			interrupts = <10 0x84>;
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| 		};
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| 
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| 		reset-warning-irq {
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| 			compatible = "ibm,reset-warning-irq";
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| 			#interrupt-cells = <2>;
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| 			interrupt-parent = <&UIC0>;
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| 			interrupts = <17 0x84>;
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| 		};
 | |
| 
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| 		MAL0: mcmal0 {
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| 			#interrupt-cells = <1>;
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| 			#address-cells = <0>;
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| 			#size-cells = <0>;
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| 			compatible = "ibm,mcmal";
 | |
| 			dcr-reg = <0x80 0x80>;
 | |
| 			num-tx-chans = <1>;
 | |
| 			num-rx-chans = <1>;
 | |
| 			interrupt-parent = <&MAL0>;
 | |
| 			interrupts = <0 1 2 3 4>;
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| 			/* index interrupt-parent interrupt# type */
 | |
| 			interrupt-map = </*TXEOB*/ 0 &UIC1_2 4 0x4
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| 					 /*RXEOB*/ 1 &UIC1_2 3 0x4
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| 					 /*SERR*/  2 &UIC1_2 7 0x4
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| 					 /*TXDE*/  3 &UIC1_2 6 0x4
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| 					 /*RXDE*/  4 &UIC1_2 5 0x4>;
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| 		};
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| 
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| 		MAL1: mcmal1 {
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| 			#interrupt-cells = <1>;
 | |
| 			#address-cells = <0>;
 | |
| 			#size-cells = <0>;
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| 			compatible = "ibm,mcmal";
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| 			dcr-reg = <0x100 0x80>;
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| 			num-tx-chans = <1>;
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| 			num-rx-chans = <1>;
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| 			interrupt-parent = <&MAL1>;
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| 			interrupts = <0 1 2 3 4>;
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| 			/* index interrupt-parent interrupt# type */
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| 			interrupt-map = </*TXEOB*/ 0 &UIC1_2 12 0x4
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| 					 /*RXEOB*/ 1 &UIC1_2 11 0x4
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| 					 /*SERR*/  2 &UIC1_2 15 0x4
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| 					 /*TXDE*/  3 &UIC1_2 14 0x4
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| 					 /*RXDE*/  4 &UIC1_2 13 0x4>;
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| 		};
 | |
| 
 | |
| 		mmc0: mmc@20c0000 {
 | |
| 			compatible	= "st,sdhci-stih407", "st,sdhci";
 | |
| 			reg		= <0x020c0000 0x20000>;
 | |
| 			reg-names	= "mmc";
 | |
| 			interrupts	= <21 0x4>;
 | |
| 			interrupt-parent = <&UIC1_3>;
 | |
| 			interrupt-names	= "mmcirq";
 | |
| 			pinctrl-names	= "default";
 | |
| 			pinctrl-0	= <>;
 | |
| 			clock-names	= "mmc";
 | |
| 			clocks		= <&mmc_clk>;
 | |
| 			bus-width	= <4>;
 | |
| 			non-removable;
 | |
| 			sd-uhs-sdr50;
 | |
| 			sd-uhs-sdr104;
 | |
| 			sd-uhs-ddr50;
 | |
| 		};
 | |
| 
 | |
| 		opb {
 | |
| 			compatible = "ibm,opb";
 | |
| 			#address-cells = <1>;
 | |
| 			#size-cells = <1>;
 | |
| 			ranges; // pass-thru to parent bus
 | |
| 			clock-frequency = <83333334>;
 | |
| 
 | |
| 			EMAC0: ethernet@b0000000 {
 | |
| 				linux,network-index = <0>;
 | |
| 				device_type = "network";
 | |
| 				compatible = "ibm,emac4sync";
 | |
| 				has-inverted-stacr-oc;
 | |
| 				interrupt-parent = <&UIC1_2>;
 | |
| 				interrupts = <1 0x4 0 0x4>;
 | |
| 				reg = <0xb0000000 0x100>;
 | |
| 				local-mac-address = [000000000000]; /* Filled in by
 | |
| 							       cuboot */
 | |
| 				mal-device = <&MAL0>;
 | |
| 				mal-tx-channel = <0>;
 | |
| 				mal-rx-channel = <0>;
 | |
| 				cell-index = <0>;
 | |
| 				max-frame-size = <1500>;
 | |
| 				rx-fifo-size = <4096>;
 | |
| 				tx-fifo-size = <4096>;
 | |
| 				rx-fifo-size-gige = <16384>;
 | |
| 				tx-fifo-size-gige = <8192>;
 | |
| 				phy-address = <1>;
 | |
| 				phy-mode = "rgmii";
 | |
| 				phy-map = <00000003>;
 | |
| 				rgmii-device = <&RGMII>;
 | |
| 				rgmii-channel = <0>;
 | |
| 			};
 | |
| 
 | |
| 			EMAC1: ethernet@b0000100 {
 | |
| 				linux,network-index = <1>;
 | |
| 				device_type = "network";
 | |
| 				compatible = "ibm,emac4sync";
 | |
| 				has-inverted-stacr-oc;
 | |
| 				interrupt-parent = <&UIC1_2>;
 | |
| 				interrupts = <9 0x4 8 0x4>;
 | |
| 				reg = <0xb0000100 0x100>;
 | |
| 				local-mac-address = [000000000000]; /* Filled in by
 | |
| 							       cuboot */
 | |
| 				mal-device = <&MAL1>;
 | |
| 				mal-tx-channel = <0>;
 | |
| 				mal-rx-channel = <0>;
 | |
| 				cell-index = <1>;
 | |
| 				max-frame-size = <1500>;
 | |
| 				rx-fifo-size = <4096>;
 | |
| 				tx-fifo-size = <4096>;
 | |
| 				rx-fifo-size-gige = <16384>;
 | |
| 				tx-fifo-size-gige = <8192>;
 | |
| 				phy-address = <2>;
 | |
| 				phy-mode = "rgmii";
 | |
| 				phy-map = <00000003>;
 | |
| 				rgmii-device = <&RGMII>;
 | |
| 				rgmii-channel = <1>;
 | |
| 			};
 | |
| 
 | |
| 			RGMII: rgmii@b0000600 {
 | |
| 				compatible = "ibm,rgmii";
 | |
| 				has-mdio;
 | |
| 				reg = <0xb0000600 0x8>;
 | |
| 			};
 | |
| 
 | |
| 			UART0: serial@b0020000 {
 | |
| 				device_type = "serial";
 | |
| 				compatible = "ns16550";
 | |
| 				reg = <0xb0020000 0x8>;
 | |
| 				virtual-reg = <0xb0020000>;
 | |
| 				clock-frequency = <20833333>;
 | |
| 				current-speed = <115200>;
 | |
| 				interrupt-parent = <&UIC0>;
 | |
| 				interrupts = <31 0x4>;
 | |
| 			};
 | |
| 		};
 | |
| 
 | |
| 		OHCI1: ohci@2040000 {
 | |
| 			compatible = "ohci-le";
 | |
| 			reg = <0x02040000 0xa0>;
 | |
| 			interrupt-parent = <&UIC1_3>;
 | |
| 			interrupts = <28 0x8 29 0x8>;
 | |
| 		};
 | |
| 
 | |
| 		OHCI2: ohci@2080000 {
 | |
| 			compatible = "ohci-le";
 | |
| 			reg = <0x02080000 0xa0>;
 | |
| 			interrupt-parent = <&UIC1_3>;
 | |
| 			interrupts = <30 0x8 31 0x8>;
 | |
| 		};
 | |
| 
 | |
| 		EHCI: ehci@2000000 {
 | |
| 			compatible = "usb-ehci";
 | |
| 			reg = <0x02000000 0xa4>;
 | |
| 			interrupt-parent = <&UIC1_3>;
 | |
| 			interrupts = <23 0x4>;
 | |
| 		};
 | |
| 
 | |
| 	};
 | |
| 
 | |
| 	chosen {
 | |
| 		stdout-path = "/plb/opb/serial@b0020000";
 | |
| 		bootargs = "console=ttyS0,115200 rw log_buf_len=32768 debug";
 | |
| 	};
 | |
| };
 |