forked from Minki/linux
12250d843e
Pull i2c-embedded changes from Wolfram Sang:
"The changes for i2c-embedded include:
- massive rework of the omap driver
- massive rework of the at91 driver. In fact, the old driver gets
removed; I am okay with this approach since the old driver was
depending on BROKEN and its limitations made it practically
unusable, so people used bitbanging instead. But even if there are
users, there is no platform_data or module parameter which would
need to be converted. It is just another driver doing I2C
transfers, just way better. Modifications of arch/arm/at91 related
files have proper acks from the maintainer.
- new driver for R-Car I2C
- devicetree and generic_clock conversions and fixes
- usual driver fixes and changes.
The rework patches have come a long way and lots of people have been
involved in creating/testing them. Most patches have been in
linux-next at least since 3.6-rc5. A few have been added in the last
week, I have to admit.
An unexpected (but welcome :)) peak in private life is the cause for
that. The "late" patches shouldn't cause any merge conflicts and I
will have a special eye on them during the stabilization phase. This
is an exception and I want to have the patches in place properly in
time again for the next kernels."
* 'i2c-embedded/for-next' of git://git.pengutronix.de/git/wsa/linux: (44 commits)
MXS: Implement DMA support into mxs-i2c
i2c: add Renesas R-Car I2C driver
i2c: s3c2410: use clk_prepare_enable and clk_disable_unprepare
ARM: OMAP: convert I2C driver to PM QoS for MPU latency constraints
i2c: nomadik: Add Device Tree support to the Nomadik I2C driver
i2c: algo: pca: Fix chip reset function for PCA9665
i2c: mpc: Wait for STOP to hit the bus
i2c: davinci: preparation for switch to common clock framework
omap-i2c: fix incorrect log message when using a device tree
i2c: omap: sanitize exit path
i2c: omap: switch over to autosuspend API
i2c: omap: remove unnecessary pm_runtime_suspended check
i2c: omap: switch to threaded IRQ support
i2c: omap: remove redundant status read
i2c: omap: get rid of the "complete" label
i2c: omap: resize fifos before each message
i2c: omap: simplify IRQ exit path
i2c: omap: always return IRQ_HANDLED
i2c: omap: simplify errata check
i2c: omap: bus: add a receiver flag
...
375 lines
10 KiB
C
375 lines
10 KiB
C
/*
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* arch/arm/mach-at91/at91sam9263.c
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*
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* Copyright (C) 2007 Atmel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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*/
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#include <linux/module.h>
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#include <asm/proc-fns.h>
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#include <asm/irq.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/system_misc.h>
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#include <mach/at91sam9263.h>
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#include <mach/at91_aic.h>
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#include <mach/at91_pmc.h>
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#include <mach/at91_rstc.h>
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#include "soc.h"
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#include "generic.h"
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#include "clock.h"
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#include "sam9_smc.h"
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/* --------------------------------------------------------------------
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* Clocks
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* -------------------------------------------------------------------- */
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/*
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* The peripheral clocks.
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*/
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static struct clk pioA_clk = {
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.name = "pioA_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_PIOA,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk pioB_clk = {
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.name = "pioB_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_PIOB,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk pioCDE_clk = {
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.name = "pioCDE_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_PIOCDE,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk usart0_clk = {
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.name = "usart0_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_US0,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk usart1_clk = {
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.name = "usart1_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_US1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk usart2_clk = {
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.name = "usart2_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_US2,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk mmc0_clk = {
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.name = "mci0_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_MCI0,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk mmc1_clk = {
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.name = "mci1_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_MCI1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk can_clk = {
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.name = "can_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_CAN,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk twi_clk = {
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.name = "twi_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_TWI,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk spi0_clk = {
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.name = "spi0_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_SPI0,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk spi1_clk = {
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.name = "spi1_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_SPI1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ssc0_clk = {
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.name = "ssc0_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_SSC0,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ssc1_clk = {
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.name = "ssc1_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_SSC1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ac97_clk = {
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.name = "ac97_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_AC97C,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk tcb_clk = {
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.name = "tcb_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_TCB,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk pwm_clk = {
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.name = "pwm_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_PWMC,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk macb_clk = {
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.name = "pclk",
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.pmc_mask = 1 << AT91SAM9263_ID_EMAC,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk dma_clk = {
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.name = "dma_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_DMA,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk twodge_clk = {
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.name = "2dge_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_2DGE,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk udc_clk = {
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.name = "udc_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_UDP,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk isi_clk = {
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.name = "isi_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_ISI,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk lcdc_clk = {
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.name = "lcdc_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_LCDC,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ohci_clk = {
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.name = "ohci_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_UHP,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk *periph_clocks[] __initdata = {
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&pioA_clk,
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&pioB_clk,
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&pioCDE_clk,
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&usart0_clk,
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&usart1_clk,
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&usart2_clk,
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&mmc0_clk,
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&mmc1_clk,
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&can_clk,
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&twi_clk,
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&spi0_clk,
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&spi1_clk,
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&ssc0_clk,
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&ssc1_clk,
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&ac97_clk,
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&tcb_clk,
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&pwm_clk,
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&macb_clk,
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&twodge_clk,
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&udc_clk,
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&isi_clk,
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&lcdc_clk,
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&dma_clk,
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&ohci_clk,
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// irq0 .. irq1
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};
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static struct clk_lookup periph_clocks_lookups[] = {
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/* One additional fake clock for macb_hclk */
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CLKDEV_CON_ID("hclk", &macb_clk),
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CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
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CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
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CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.0", &mmc0_clk),
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CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.1", &mmc1_clk),
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CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
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CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
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CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
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CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260", &twi_clk),
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/* fake hclk clock */
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CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
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CLKDEV_CON_ID("pioA", &pioA_clk),
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CLKDEV_CON_ID("pioB", &pioB_clk),
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CLKDEV_CON_ID("pioC", &pioCDE_clk),
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CLKDEV_CON_ID("pioD", &pioCDE_clk),
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CLKDEV_CON_ID("pioE", &pioCDE_clk),
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/* more usart lookup table for DT entries */
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CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck),
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CLKDEV_CON_DEV_ID("usart", "fff8c000.serial", &usart0_clk),
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CLKDEV_CON_DEV_ID("usart", "fff90000.serial", &usart1_clk),
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CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk),
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/* more tc lookup table for DT entries */
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CLKDEV_CON_DEV_ID("t0_clk", "fff7c000.timer", &tcb_clk),
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CLKDEV_CON_DEV_ID("hclk", "a00000.ohci", &ohci_clk),
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CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk),
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CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk),
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CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi_clk),
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};
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static struct clk_lookup usart_clocks_lookups[] = {
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CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
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CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
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CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
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CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
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};
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/*
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* The four programmable clocks.
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* You must configure pin multiplexing to bring these signals out.
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*/
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static struct clk pck0 = {
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.name = "pck0",
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.pmc_mask = AT91_PMC_PCK0,
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.type = CLK_TYPE_PROGRAMMABLE,
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.id = 0,
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};
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static struct clk pck1 = {
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.name = "pck1",
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.pmc_mask = AT91_PMC_PCK1,
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.type = CLK_TYPE_PROGRAMMABLE,
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.id = 1,
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};
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static struct clk pck2 = {
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.name = "pck2",
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.pmc_mask = AT91_PMC_PCK2,
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.type = CLK_TYPE_PROGRAMMABLE,
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.id = 2,
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};
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static struct clk pck3 = {
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.name = "pck3",
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.pmc_mask = AT91_PMC_PCK3,
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.type = CLK_TYPE_PROGRAMMABLE,
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.id = 3,
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};
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static void __init at91sam9263_register_clocks(void)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
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clk_register(periph_clocks[i]);
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clkdev_add_table(periph_clocks_lookups,
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ARRAY_SIZE(periph_clocks_lookups));
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clkdev_add_table(usart_clocks_lookups,
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ARRAY_SIZE(usart_clocks_lookups));
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clk_register(&pck0);
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clk_register(&pck1);
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clk_register(&pck2);
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clk_register(&pck3);
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}
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/* --------------------------------------------------------------------
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* GPIO
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* -------------------------------------------------------------------- */
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static struct at91_gpio_bank at91sam9263_gpio[] __initdata = {
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{
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.id = AT91SAM9263_ID_PIOA,
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.regbase = AT91SAM9263_BASE_PIOA,
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}, {
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.id = AT91SAM9263_ID_PIOB,
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.regbase = AT91SAM9263_BASE_PIOB,
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}, {
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.id = AT91SAM9263_ID_PIOCDE,
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.regbase = AT91SAM9263_BASE_PIOC,
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}, {
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.id = AT91SAM9263_ID_PIOCDE,
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.regbase = AT91SAM9263_BASE_PIOD,
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}, {
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.id = AT91SAM9263_ID_PIOCDE,
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.regbase = AT91SAM9263_BASE_PIOE,
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}
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};
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/* --------------------------------------------------------------------
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* AT91SAM9263 processor initialization
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* -------------------------------------------------------------------- */
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static void __init at91sam9263_map_io(void)
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{
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at91_init_sram(0, AT91SAM9263_SRAM0_BASE, AT91SAM9263_SRAM0_SIZE);
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at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE);
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}
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static void __init at91sam9263_ioremap_registers(void)
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{
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at91_ioremap_shdwc(AT91SAM9263_BASE_SHDWC);
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at91_ioremap_rstc(AT91SAM9263_BASE_RSTC);
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at91_ioremap_ramc(0, AT91SAM9263_BASE_SDRAMC0, 512);
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at91_ioremap_ramc(1, AT91SAM9263_BASE_SDRAMC1, 512);
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at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT);
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at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0);
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at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
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at91_ioremap_matrix(AT91SAM9263_BASE_MATRIX);
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}
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static void __init at91sam9263_initialize(void)
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{
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arm_pm_idle = at91sam9_idle;
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arm_pm_restart = at91sam9_alt_restart;
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at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
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/* Register GPIO subsystem */
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at91_gpio_init(at91sam9263_gpio, 5);
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}
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/* --------------------------------------------------------------------
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* Interrupt initialization
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* -------------------------------------------------------------------- */
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/*
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* The default interrupt priority levels (0 = lowest, 7 = highest).
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*/
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static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
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7, /* Advanced Interrupt Controller (FIQ) */
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7, /* System Peripherals */
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1, /* Parallel IO Controller A */
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1, /* Parallel IO Controller B */
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1, /* Parallel IO Controller C, D and E */
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0,
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0,
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5, /* USART 0 */
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5, /* USART 1 */
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5, /* USART 2 */
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0, /* Multimedia Card Interface 0 */
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0, /* Multimedia Card Interface 1 */
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3, /* CAN */
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6, /* Two-Wire Interface */
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5, /* Serial Peripheral Interface 0 */
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5, /* Serial Peripheral Interface 1 */
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4, /* Serial Synchronous Controller 0 */
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4, /* Serial Synchronous Controller 1 */
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5, /* AC97 Controller */
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0, /* Timer Counter 0, 1 and 2 */
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0, /* Pulse Width Modulation Controller */
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3, /* Ethernet */
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0,
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0, /* 2D Graphic Engine */
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2, /* USB Device Port */
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0, /* Image Sensor Interface */
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3, /* LDC Controller */
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0, /* DMA Controller */
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0,
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2, /* USB Host port */
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0, /* Advanced Interrupt Controller (IRQ0) */
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0, /* Advanced Interrupt Controller (IRQ1) */
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};
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struct at91_init_soc __initdata at91sam9263_soc = {
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.map_io = at91sam9263_map_io,
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.default_irq_priority = at91sam9263_default_irq_priority,
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.ioremap_registers = at91sam9263_ioremap_registers,
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.register_clocks = at91sam9263_register_clocks,
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.init = at91sam9263_initialize,
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};
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